v.AddArg2(x, r)
		return true
	}
	// match: (ANDconst [m] (SRWconst x [s]))
	// cond: mergePPC64RShiftMask(m,s,32) == 0
	// result: (MOVDconst [0])
	for {
		m := auxIntToInt64(v.AuxInt)
		if v_0.Op != OpPPC64SRWconst {
			break
		}
		s := auxIntToInt64(v_0.AuxInt)
		if !(mergePPC64RShiftMask(m, s, 32) == 0) {
			break
		}
		v.reset(OpPPC64MOVDconst)
		v.AuxInt = int64ToAuxInt(0)