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Results 1 - 9 of 9 for dmul (0.1 sec)

  1. src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/tables.go

    	DENBCDQCC:      "denbcdq.",
    	DIEX:           "diex",
    	DIEXCC:         "diex.",
    	DIEXQCC:        "diexq.",
    	DIEXQ:          "diexq",
    	DMUL:           "dmul",
    	DMULCC:         "dmul.",
    	DMULQ:          "dmulq",
    	DMULQCC:        "dmulq.",
    	DQUA:           "dqua",
    	DQUACC:         "dqua.",
    	DQUAI:          "dquai",
    	DQUAICC:        "dquai.",
    	DQUAIQ:         "dquaiq",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Nov 22 17:16:14 UTC 2022
    - 334.7K bytes
    - Viewed (0)
  2. src/cmd/vendor/golang.org/x/arch/x86/x86asm/tables.go

    	/*13163*/ uint16(xCondDataSize), 13167, 13171, 0,
    	/*13167*/ uint16(xSetOp), uint16(IMUL),
    	/*13169*/ uint16(xArgRM16),
    	/*13170*/ uint16(xMatch),
    	/*13171*/ uint16(xSetOp), uint16(IMUL),
    	/*13173*/ uint16(xArgRM32),
    	/*13174*/ uint16(xMatch),
    	/*13175*/ uint16(xCondDataSize), 13167, 13171, 13179,
    	/*13179*/ uint16(xSetOp), uint16(IMUL),
    	/*13181*/ uint16(xArgRM64),
    	/*13182*/ uint16(xMatch),
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon May 16 22:24:28 UTC 2022
    - 266.8K bytes
    - Viewed (0)
  3. tensorflow/compiler/mlir/lite/tests/fuse-tftext.mlir

      %178 = "tf.Pack"(%7, %177) {axis = 0 : i64, device = ""} : (tensor<i32>, tensor<i32>) -> tensor<2xi32>
      %179 = "tf.Tile"(%115, %178) {device = ""} : (tensor<?x1xi64>, tensor<2xi32>) -> tensor<?x?xi64>
      %180 = "tf.Mul"(%177, %118) {device = ""} : (tensor<i32>, tensor<i32>) -> tensor<i32>
      %181 = "tf.Pack"(%180) {axis = 0 : i64, device = ""} : (tensor<i32>) -> tensor<1xi32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 02 09:41:17 UTC 2024
    - 460.3K bytes
    - Viewed (0)
  4. src/cmd/compile/internal/ssagen/ssa.go

    	{ir.OMUL, types.TINT8}:    ssa.OpMul8,
    	{ir.OMUL, types.TUINT8}:   ssa.OpMul8,
    	{ir.OMUL, types.TINT16}:   ssa.OpMul16,
    	{ir.OMUL, types.TUINT16}:  ssa.OpMul16,
    	{ir.OMUL, types.TINT32}:   ssa.OpMul32,
    	{ir.OMUL, types.TUINT32}:  ssa.OpMul32,
    	{ir.OMUL, types.TINT64}:   ssa.OpMul64,
    	{ir.OMUL, types.TUINT64}:  ssa.OpMul64,
    	{ir.OMUL, types.TFLOAT32}: ssa.OpMul32F,
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Jun 10 19:44:43 UTC 2024
    - 284.9K bytes
    - Viewed (0)
  5. tensorflow/compiler/mlir/tf2xla/tests/legalize-tf.mlir

      // CHECK-NEXT: %[[mul:.*]] = mhlo.multiply %[[grad]], %[[sub]] : tensor<8x8x8x8xf32>
      // CHECK-NEXT: mhlo.constant dense<[0, 1, 2]> : tensor<3xi64>
      // CHECK-NEXT: %[[cmul:.*]] = mhlo.convert %[[mul]] : tensor<8x8x8x8xf32>
      // CHECK-NEXT: %[[init:.*]] = mhlo.constant dense<-0.000000e+00> : tensor<f32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon May 06 18:46:23 UTC 2024
    - 335.5K bytes
    - Viewed (0)
  6. tensorflow/compiler/mlir/lite/stablehlo/tests/legalize_hlo.mlir

    }
    
    // CHECK-LABEL:   func @mul(
    // CHECK-SAME:              %[[VAL_0:.*]]: tensor<2xi32>) -> tensor<2xi32> {
    // CHECK:           %[[VAL_1:.*]] = "tf.Mul"(%[[VAL_0]], %[[VAL_0]]) : (tensor<2xi32>, tensor<2xi32>) -> tensor<2xi32>
    // CHECK:           return %[[VAL_1]] : tensor<2xi32>
    // CHECK:         }
    func.func @mul(%arg0: tensor<2xi32>) -> tensor<2xi32> {
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed May 29 07:26:59 UTC 2024
    - 340.2K bytes
    - Viewed (0)
  7. src/cmd/vendor/golang.org/x/arch/arm/armasm/tables.go

    	MUL:               "MUL",
    	MUL_ZZ:            "MUL.ZZ",
    	MUL_S_EQ:          "MUL.S.EQ",
    	MUL_S_NE:          "MUL.S.NE",
    	MUL_S_CS:          "MUL.S.CS",
    	MUL_S_CC:          "MUL.S.CC",
    	MUL_S_MI:          "MUL.S.MI",
    	MUL_S_PL:          "MUL.S.PL",
    	MUL_S_VS:          "MUL.S.VS",
    	MUL_S_VC:          "MUL.S.VC",
    	MUL_S_HI:          "MUL.S.HI",
    	MUL_S_LS:          "MUL.S.LS",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Aug 16 17:57:48 UTC 2017
    - 267.4K bytes
    - Viewed (0)
  8. src/cmd/compile/internal/ssa/rewritePPC64.go

    		v.AuxInt = float64ToAuxInt(math.Abs(x))
    		return true
    	}
    	return false
    }
    func rewriteValuePPC64_OpPPC64FADD(v *Value) bool {
    	v_1 := v.Args[1]
    	v_0 := v.Args[0]
    	// match: (FADD (FMUL x y) z)
    	// cond: x.Block.Func.useFMA(v)
    	// result: (FMADD x y z)
    	for {
    		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
    			if v_0.Op != OpPPC64FMUL {
    				continue
    			}
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Jun 07 19:02:52 UTC 2024
    - 360.2K bytes
    - Viewed (0)
  9. src/cmd/compile/internal/ssa/rewriteS390X.go

    		if v_0_1.Op != OpS390XMOVDconst {
    			break
    		}
    		d := auxIntToInt64(v_0_1.AuxInt)
    		v.reset(OpS390XMOVDconst)
    		v.AuxInt = int64ToAuxInt(c - d)
    		return true
    	}
    	// match: (Select0 (FADD (FMUL y z) x))
    	// cond: x.Block.Func.useFMA(v)
    	// result: (FMADD x y z)
    	for {
    		if v_0.Op != OpS390XFADD {
    			break
    		}
    		_ = v_0.Args[1]
    		v_0_0 := v_0.Args[0]
    		v_0_1 := v_0.Args[1]
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 12 18:09:26 UTC 2023
    - 395.1K bytes
    - Viewed (0)
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