[6]*argField{ap_CondRegBit_6_10, ap_CondRegBit_11_15, ap_CondRegBit_16_20}},
	{CRNAND, 0xfc0007fe00000000, 0x4c0001c200000000, 0x100000000, // Condition Register NAND XL-form (crnand BT,BA,BB)
		[6]*argField{ap_CondRegBit_6_10, ap_CondRegBit_11_15, ap_CondRegBit_16_20}},
	{CRNOR, 0xfc0007fe00000000, 0x4c00004200000000, 0x100000000, // Condition Register NOR XL-form (crnor BT,BA,BB)

	/*5742*/ uint16(xCondIs64), 5745, 5761,
	/*5745*/ uint16(xCondDataSize), 5749, 5755, 0,
	/*5749*/ uint16(xSetOp), uint16(BT),
	/*5751*/ uint16(xReadSlashR),
	/*5752*/ uint16(xArgRM16),
	/*5753*/ uint16(xArgR16),
	/*5754*/ uint16(xMatch),
	/*5755*/ uint16(xSetOp), uint16(BT),
	/*5757*/ uint16(xReadSlashR),
	/*5758*/ uint16(xArgRM32),
	/*5759*/ uint16(xArgR32),
	/*5760*/ uint16(xMatch),

gp(i){return{line:i[A.FIELDS.START_LINE],column:i[A.FIELDS.START_COL]}}function yp(i){return{line:i[A.FIELDS.END_LINE],column:i[A.FIELDS.END_COL]}}function bt(i,e,t,r){return{start:{line:i,column:e},end:{line:t,column:r}}}function It(i){return bt(i[A.FIELDS.START_LINE],i[A.FIELDS.START_COL],i[A.FIELDS.END_LINE],i[A.FIELDS.END_COL])}function Ca(i,e){if(!!i)return bt(i[A.FIELDS.START_LINE],i[A.FIELDS.START_COL],e[A.FIELDS.END_LINE],e[A.FIELDS.END_COL])}function qt(i,e){var t=i[e];if(typeof t=="string")return ...

		n := n.(*ir.BinaryExpr)
		a := s.expr(n.X)
		b := s.expr(n.Y)
		bt := b.Type
		if bt.IsSigned() {
			cmp := s.newValue2(s.ssaOp(ir.OLE, bt), types.Types[types.TBOOL], s.zeroVal(bt), b)
			s.check(cmp, ir.Syms.Panicshift)
			bt = bt.ToUnsigned()
		}
		return s.newValue2(s.ssaShiftOp(n.Op(), n.Type(), bt), a.Type, a, b)
	case ir.OANDAND, ir.OOROR:
		// To implement OANDAND (and OOROR), we introduce a