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Results 1 - 4 of 4 for lessEqual (0.45 sec)
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src/cmd/compile/internal/ssa/rewritePPC64.go
} func rewriteValuePPC64_OpPPC64LessEqual(v *Value) bool { v_0 := v.Args[0] // match: (LessEqual (FlagEQ)) // result: (MOVDconst [1]) for { if v_0.Op != OpPPC64FlagEQ { break } v.reset(OpPPC64MOVDconst) v.AuxInt = int64ToAuxInt(1) return true } // match: (LessEqual (FlagLT)) // result: (MOVDconst [1]) for { if v_0.Op != OpPPC64FlagLT { break }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jun 07 19:02:52 UTC 2024 - 360.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/fuse-tftext.mlir
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 02 09:41:17 UTC 2024 - 460.3K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteARM.go
v_0 := v.Args[0] // match: (LessEqual (FlagConstant [fc])) // result: (MOVWconst [b2i32(fc.le())]) for { if v_0.Op != OpARMFlagConstant { break } fc := auxIntToFlagConstant(v_0.AuxInt) v.reset(OpARMMOVWconst) v.AuxInt = int32ToAuxInt(b2i32(fc.le())) return true } // match: (LessEqual (InvertFlags x)) // result: (GreaterEqual x) for {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Nov 20 17:19:36 UTC 2023 - 486.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/stablehlo/tests/legalize_hlo.mlir
func.return %0 : tensor<1x2xi1> } // CHECK-LABEL: func @less_equal( // CHECK-SAME: %[[VAL_0:.*]]: tensor<2xi32>, // CHECK-SAME: %[[VAL_1:.*]]: tensor<2xi32>) -> tensor<2xi1> { // CHECK: %[[VAL_2:.*]] = "tf.LessEqual"(%[[VAL_0]], %[[VAL_1]]) : (tensor<2xi32>, tensor<2xi32>) -> tensor<2xi1> // CHECK: return %[[VAL_2]] : tensor<2xi1>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed May 29 07:26:59 UTC 2024 - 340.2K bytes - Viewed (0)