func coveredValidation(vA, vB *OverlappingMatchValidationForHTTPRoute) bool {
	// check the URI overlapping match, such as vB.Prefix is '/debugs' and vA.Prefix is '/debug'
	if strings.HasPrefix(vB.Prefix, vA.Prefix) {
		// check the port field
		if vB.MatchPort != vA.MatchPort {
			return false
		}

		// check the match method
		if vA.MatchMethod != vB.MatchMethod {

{"Name":"SQDMLAL, SQDMLAL2 (vector)","Bits":"0|1|0|1|1|1|1|0|size:2|1|Rm:5|1|0|0|1|0|0|Rn:5|Rd:5","Arch":"Scalar Scalar variant","Syntax":"SQDMLAL <Va><d>, <Vb><n>, <Vb><m>","Code":"","Alias":""},
{"Name":"SQDMLAL, SQDMLAL2 (vector)","Bits":"0|0|0|0|1|1|1|0|size:2|1|Rm:5|1|0|0|1|0|0|Rn:5|Rd:5","Arch":"Vector Vector variant","Syntax":"SQDMLAL <Vd>.<Ta>, <Vn>.<Tb>, <Vm>.<Tb>","Code":"","Alias":""},

,WAIN,IAHA,IAAI5R,EACHlC,EAAI,EAE2B,OAAtBkC,EAAOrE,KAAMmC,IAAeA,IACd,IAAlBkC,EAAK9C,WAGTyB,EAAO6sB,UAAW/I,GAAQziB,GAAM,IAGhCA,EAAKoO,YAAc,IAIrB,OAAOzS,MAGRwF,MAAO,SAAUsqB,EAAeC,GAI/B,OAHAD,EAAiC,MAAjBA,GAAgCA,EAChDC,EAAyC,MAArBA,EAA4BD,EAAgBC,EAEzD/vB,KAAKoE,IAAK,WAChB,OAAOpB,EAAOwC,MAAOxF,KAAM8vB,EAAeC,MAI5CL,KAAM,SAAUvoB,GACf,OAAOoa,EAAQvhB,KAAM,SAAUmH,GAC9B,IAAI9C,EAAOrE,KAAM,IAAO,GACvBmC,EAAI,EACJoZ,EAAIvb,KAAKsD,OAEV,QAAewC,IAAVqB,GAAyC,IAAlB9C,EAAK9C,SAChC,OAAO8C,EAAK2M,UAIb,GAAsB,iBAAV7J,...

,WAIN,IAHA,IAAI5R,EACHlC,EAAI,EAE2B,OAAtBkC,EAAOrE,KAAMmC,IAAeA,IACd,IAAlBkC,EAAK9C,WAGTyB,EAAO6sB,UAAW/I,GAAQziB,GAAM,IAGhCA,EAAKoO,YAAc,IAIrB,OAAOzS,MAGRwF,MAAO,SAAUsqB,EAAeC,GAI/B,OAHAD,EAAiC,MAAjBA,GAAgCA,EAChDC,EAAyC,MAArBA,EAA4BD,EAAgBC,EAEzD/vB,KAAKoE,IAAK,WAChB,OAAOpB,EAAOwC,MAAOxF,KAAM8vB,EAAeC,MAI5CL,KAAM,SAAUvoB,GACf,OAAOoa,EAAQvhB,KAAM,SAAUmH,GAC9B,IAAI9C,EAAOrE,KAAM,IAAO,GACvBmC,EAAI,EACJoZ,EAAIvb,KAAKsD,OAEV,QAAewC,IAAVqB,GAAyC,IAAlB9C,EAAK9C,SAChC,OAAO8C,EAAK2M,UAIb,GAAsB,iBAAV7J,...

		(uint8(b1)<<4)|uint8((d1>>8)&0x0F),
		uint8(d1),
		(uint8(b2)<<4)|uint8((d2>>8)&0x0F),
		uint8(d2))
}

func rxb(va, vb, vc, vd uint32) uint8 {
	mask := uint8(0)
	if va >= REG_V16 && va <= REG_V31 {
		mask |= 0x8
	}
	if vb >= REG_V16 && vb <= REG_V31 {
		mask |= 0x4
	}
	if vc >= REG_V16 && vc <= REG_V31 {
		mask |= 0x2
	}
	if vd >= REG_V16 && vd <= REG_V31 {

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