{0xffffffff, 0xd69f03e0, ERET, instArgs{}, nil},
	// ROR <Wd>, <Ws>, #<shift>
	{0xffe08000, 0x13800000, ROR, instArgs{arg_Wd, arg_Ws, arg_immediate_0_31_imms}, ror_extr_32_extract_cond},
	// EXTR <Wd>, <Wn>, <Wm>, #<lsb>
	{0xffe08000, 0x13800000, EXTR, instArgs{arg_Wd, arg_Wn, arg_Wm, arg_immediate_0_31_imms}, nil},
	// ROR <Xd>, <Xs>, #<shift>

{"Name":"ROR (immediate)","Bits":"0|0|0|1|0|0|1|1|1|0|0|Rm:5|imms:6|Rn:5|Rd:5","Arch":"32-bit variant","Syntax":"ROR <Wd>, <Ws>, #<shift>","Code":"","Alias":"This instruction is an alias of the EXTR instruction."},

(RotateLeft16 <t> x y) => (RORW <t> (ORshiftLL <typ.UInt32> (ZeroExt16to32 x) (ZeroExt16to32 x) [16]) (NEG <typ.Int64> y))
(RotateLeft32 x y) => (RORW x (NEG <y.Type> y))
(RotateLeft64 x y) => (ROR x (NEG <y.Type> y))

(Ctz(64|32|16|8)NonZero ...) => (Ctz(64|32|32|32) ...)

(Ctz64 <t> x) => (CLZ  (RBIT  <t> x))
(Ctz32 <t> x) => (CLZW (RBITW <t> x))

		}
		val := auxIntToInt64(v_1.AuxInt)
		v.reset(OpRISCV64RORI)
		v.AuxInt = int64ToAuxInt(int64(int8(-val) & 63))
		v.AddArg(x)
		return true
	}
	// match: (ROL x (NEG y))
	// result: (ROR x y)
	for {
		x := v_0
		if v_1.Op != OpRISCV64NEG {
			break
		}
		y := v_1.Args[0]
		v.reset(OpRISCV64ROR)
		v.AddArg2(x, y)
		return true
	}
	return false
}