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Results 1 - 2 of 2 for gpr (0.02 sec)

  1. src/cmd/internal/obj/ppc64/asm9.go

    			o1, o2 = pfxload(p.As, p.To.Reg, int16(r), PFX_R_ABS)
    			o1 |= uint32((v >> 16) & 0x3FFFF)
    			o2 |= uint32(v & 0xFFFF)
    		} else {
    			if o.a6 == C_REG {
    				// Reuse the base register when loading a GPR (C_REG) to avoid
    				// using REGTMP (R31) when possible.
    				o1 = AOP_IRR(OP_ADDIS, uint32(p.To.Reg), uint32(r), uint32(high16adjusted(v)))
    				o2 = AOP_IRR(c.opload(p.As), uint32(p.To.Reg), uint32(p.To.Reg), uint32(v))
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 15 13:55:28 UTC 2024
    - 156.1K bytes
    - Viewed (0)
  2. src/cmd/compile/internal/ssa/_gen/ARM64.rules

    (FMOVDgpfp <t> (Arg [off] {sym})) => @b.Func.Entry (Arg <t> [off] {sym})
    (FMOVDfpgp <t> (Arg [off] {sym})) => @b.Func.Entry (Arg <t> [off] {sym})
    
    // Similarly for stores, if we see a store after FPR <=> GPR move, then redirect store to use the other register set.
    (MOVDstore  [off] {sym} ptr (FMOVDfpgp val) mem) => (FMOVDstore [off] {sym} ptr val mem)
    (FMOVDstore [off] {sym} ptr (FMOVDgpfp val) mem) => (MOVDstore [off] {sym} ptr val mem)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 113.1K bytes
    - Viewed (0)
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