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Results 1 - 10 of 14 for div0 (0.27 sec)
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tensorflow/compiler/mlir/tensorflow/ir/tf_ops_a_m.cc
if (rank == 1) { int64_t dim0 = input_ty.getDimSize(0); if (dim0 != ShapedType::kDynamic && dim0 != 4 && dim0 != 2) return op.emitOpError("requires 1D input of size 4 or size 2"); } if (rank == 2) { int64_t dim0 = input_ty.getDimSize(0); if (dim0 != ShapedType::kDynamic && dim0 != 4) return op.emitOpError(
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 146.7K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/generic.rules
x)) (Const64 <typ.UInt64> [umagic64(c).s-1])) // Signed divide by a negative constant. Rewrite to divide by a positive constant. (Div8 <t> n (Const8 [c])) && c < 0 && c != -1<<7 => (Neg8 (Div8 <t> n (Const8 <t> [-c]))) (Div16 <t> n (Const16 [c])) && c < 0 && c != -1<<15 => (Neg16 (Div16 <t> n (Const16 <t> [-c])))
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 16 22:21:05 UTC 2024 - 135.3K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteMIPS64.go
v.AddArg(v0) return true } } func rewriteValueMIPS64_OpDiv8(v *Value) bool { v_1 := v.Args[1] v_0 := v.Args[0] b := v.Block typ := &b.Func.Config.Types // match: (Div8 x y) // result: (Select1 (DIVV (SignExt8to64 x) (SignExt8to64 y))) for { x := v_0 y := v_1 v.reset(OpSelect1) v0 := b.NewValue0(v.Pos, OpMIPS64DIVV, types.NewTuple(typ.Int64, typ.Int64))
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Jul 31 03:59:48 UTC 2023 - 211.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/canonicalize.mlir
// Fold pack operation if it computes the input tensor shape: // // %shape = tf.Shape(%arg) // [? x ...] // %dim0 = tf.StridedSlice(%shape, 0, 1, 1) // get unknown dim0 value // %pack = tf.Pack(dim0, ...) { axis = 0 } // [? x ...] // // Where `...` are some statically known dimensions. In this case %pack can be
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 09 22:07:10 UTC 2024 - 132.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/ir/tf_ops_n_z.cc
OpFoldResult PackOp::fold(FoldAdaptor) { // Fold pack operation if it computes the input tensor shape: // // %shape = tf.Shape(%arg) // [? x ...] // %dim0 = tf.StridedSlice(%shape, 0, 1, 1) // get unknown dim0 value // %pack = tf.Pack(dim0, ...) { axis = 0 } // [? x ...] // // Where `...` are some statically known dimensions. In this case %pack can be
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 09 22:07:10 UTC 2024 - 170.8K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/AMD64Ops.go
{name: "DIVQU", argLength: 2, reg: gp11div, typ: "(UInt64,UInt64)", asm: "DIVQ", clobberFlags: true}, {name: "DIVLU", argLength: 2, reg: gp11div, typ: "(UInt32,UInt32)", asm: "DIVL", clobberFlags: true}, {name: "DIVWU", argLength: 2, reg: gp11div, typ: "(UInt16,UInt16)", asm: "DIVW", clobberFlags: true}, // computes -arg0, flags set for 0-arg0.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Aug 04 16:40:24 UTC 2023 - 98K bytes - Viewed (1) -
src/cmd/compile/internal/ssa/rewriteRISCV64.go
typ := &b.Func.Config.Types // match: (Div8 x y) // result: (DIVW (SignExt8to32 x) (SignExt8to32 y)) for { x := v_0 y := v_1 v.reset(OpRISCV64DIVW) v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32) v0.AddArg(x) v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32) v1.AddArg(y) v.AddArg2(v0, v1) return true } } func rewriteValueRISCV64_OpDiv8u(v *Value) bool {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Mar 07 14:57:07 UTC 2024 - 205.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteWasm.go
v.AddArg2(x, y) return true } return false } func rewriteValueWasm_OpDiv8(v *Value) bool { v_1 := v.Args[1] v_0 := v.Args[0] b := v.Block typ := &b.Func.Config.Types // match: (Div8 x y) // result: (I64DivS (SignExt8to64 x) (SignExt8to64 y)) for { x := v_0 y := v_1 v.reset(OpWasmI64DivS) v0 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64) v0.AddArg(x)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Feb 17 03:56:57 UTC 2023 - 108.6K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARM64.rules
(Select0 (Mul64uhilo x y)) => (UMULH x y) (Select1 (Mul64uhilo x y)) => (MUL x y) (Div64 [false] x y) => (DIV x y) (Div32 [false] x y) => (DIVW x y) (Div16 [false] x y) => (DIVW (SignExt16to32 x) (SignExt16to32 y)) (Div16u x y) => (UDIVW (ZeroExt16to32 x) (ZeroExt16to32 y)) (Div8 x y) => (DIVW (SignExt8to32 x) (SignExt8to32 y)) (Div8u x y) => (UDIVW (ZeroExt8to32 x) (ZeroExt8to32 y)) (Div64u ...) => (UDIV ...)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 113.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteMIPS.go
v_0 := v.Args[0] b := v.Block typ := &b.Func.Config.Types // match: (Div8 x y) // result: (Select1 (DIV (SignExt8to32 x) (SignExt8to32 y))) for { x := v_0 y := v_1 v.reset(OpSelect1) v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32)) v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32) v1.AddArg(x) v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 24 14:43:03 UTC 2023 - 176.6K bytes - Viewed (0)