case ACMPW:
		return OPVCC(31, 0, 0, 0) /* L=0 */
	case ACMPWU:
		return OPVCC(31, 32, 0, 0)
	case ACMPB:
		return OPVCC(31, 508, 0, 0) /* cmpb - v2.05 */
	case ACMPEQB:
		return OPVCC(31, 224, 0, 0) /* cmpeqb - v3.00 */

	case ACNTLZW:
		return OPVCC(31, 26, 0, 0)
	case ACNTLZWCC:
		return OPVCC(31, 26, 0, 1)
	case ACNTLZD:
		return OPVCC(31, 58, 0, 0)

(Load <t1> p1 (Store {t2} p2 x _))
	&& isSamePtr(p1, p2)
	&& t1.Compare(x.Type) == types.CMPeq
	&& t1.Size() == t2.Size()
	=> x
(Load <t1> p1 (Store {t2} p2 _ (Store {t3} p3 x _)))
	&& isSamePtr(p1, p3)
	&& t1.Compare(x.Type) == types.CMPeq
	&& t1.Size() == t2.Size()
	&& disjoint(p3, t3.Size(), p2, t2.Size())
	=> x

		v.AddArg(v0)
		return true
	}
}
func rewriteValueMIPS_OpEq32F(v *Value) bool {
	v_1 := v.Args[1]
	v_0 := v.Args[0]
	b := v.Block
	// match: (Eq32F x y)
	// result: (FPFlagTrue (CMPEQF x y))
	for {
		x := v_0
		y := v_1
		v.reset(OpMIPSFPFlagTrue)
		v0 := b.NewValue0(v.Pos, OpMIPSCMPEQF, types.TypeFlags)
		v0.AddArg2(x, y)
		v.AddArg(v0)
		return true
	}
}

		v.AddArg2(v0, v1)
		return true
	}
}
func rewriteValueLOONG64_OpEq32F(v *Value) bool {
	v_1 := v.Args[1]
	v_0 := v.Args[0]
	b := v.Block
	// match: (Eq32F x y)
	// result: (FPFlagTrue (CMPEQF x y))
	for {
		x := v_0
		y := v_1
		v.reset(OpLOONG64FPFlagTrue)
		v0 := b.NewValue0(v.Pos, OpLOONG64CMPEQF, types.TypeFlags)
		v0.AddArg2(x, y)
		v.AddArg(v0)
		return true
	}
}

		v.AddArg2(v0, v1)
		return true
	}
}
func rewriteValueMIPS64_OpEq32F(v *Value) bool {
	v_1 := v.Args[1]
	v_0 := v.Args[0]
	b := v.Block
	// match: (Eq32F x y)
	// result: (FPFlagTrue (CMPEQF x y))
	for {
		x := v_0
		y := v_1
		v.reset(OpMIPS64FPFlagTrue)
		v0 := b.NewValue0(v.Pos, OpMIPS64CMPEQF, types.TypeFlags)
		v0.AddArg2(x, y)
		v.AddArg(v0)
		return true
	}
}

vV,EAAOwV,EAASC,EAAQC,GAC5C,IAAIC,EAEJ,IAGM3V,GAAS9F,EAAcyb,EAAS3V,EAAM4V,SAC1CD,EAAOrc,KAAM0G,GAAQ0B,KAAM8T,GAAUK,KAAMJ,GAGhCzV,GAAS9F,EAAcyb,EAAS3V,EAAM8V,MACjDH,EAAOrc,KAAM0G,EAAOwV,EAASC,GAQ7BD,EAAQhc,WAAOmF,EAAW,CAAEqB,GAAQ7G,MAAOuc,IAM3C,MAAQ1V,GAITyV,EAAOjc,WAAOmF,EAAW,CAAEqB,KAvO7BnE,EAAOka,UAAY,SAAU9X,GA9B7B,IAAwBA,EACnB+X,EAiCJ/X,EAA6B,iBAAZA,GAlCMA,EAmCPA,EAlCZ+X,EAAS,GACbna,EAAOkB,KAAMkB,EAAQ0H,MAAOuP,IAAmB,GAAI,SAAUe,EAAGC,GAC/DF,EAAQE,IAAS,IAEXF,GA+BNna,EAAOmC,OAAQ,GAAIC,GAEpB,IACC...

vV,EAAOwV,EAASC,EAAQC,GAC5C,IAAIC,EAEJ,IAGM3V,GAAS9F,EAAcyb,EAAS3V,EAAM4V,SAC1CD,EAAOrc,KAAM0G,GAAQ0B,KAAM8T,GAAUK,KAAMJ,GAGhCzV,GAAS9F,EAAcyb,EAAS3V,EAAM8V,MACjDH,EAAOrc,KAAM0G,EAAOwV,EAASC,GAQ7BD,EAAQhc,WAAOmF,EAAW,CAAEqB,GAAQ7G,MAAOuc,IAM3C,MAAQ1V,GAITyV,EAAOjc,WAAOmF,EAAW,CAAEqB,KAvO7BnE,EAAOka,UAAY,SAAU9X,GA9B7B,IAAwBA,EACnB+X,EAiCJ/X,EAA6B,iBAAZA,GAlCMA,EAmCPA,EAlCZ+X,EAAS,GACbna,EAAOkB,KAAMkB,EAAQ0H,MAAOuP,IAAmB,GAAI,SAAUe,EAAGC,GAC/DF,EAAQE,IAAS,IAEXF,GA+BNna,EAAOmC,OAAQ,GAAIC,GAEpB,IACC...

			// COMPARE LOGICAL AND BRANCH RELATIVE (64)
			opcode = op_CLGRJ
		}

		if int32(int16(v)) != v {
			// The branch is too far for one instruction so crack
			// `CMPBEQ x, y, target` into:
			//
			//     CMPBNE x, y, 2(PC)
			//     BR     target
			//
			// Note that the instruction sequence MUST NOT clobber
			// the condition code.
			m3 ^= 0xe // invert 3-bit mask

	{APAUSE, ynone, Px, opBytes{0xf3, 0x90}},
	{APAVGB, ymm, Py1, opBytes{0xe0, Pe, 0xe0}},
	{APAVGW, ymm, Py1, opBytes{0xe3, Pe, 0xe3}},
	{APBLENDW, yxshuf, Pq, opBytes{0x3a, 0x0e, 0}},
	{APCMPEQB, ymm, Py1, opBytes{0x74, Pe, 0x74}},
	{APCMPEQL, ymm, Py1, opBytes{0x76, Pe, 0x76}},
	{APCMPEQQ, yxm_q4, Pq4, opBytes{0x29}},
	{APCMPEQW, ymm, Py1, opBytes{0x75, Pe, 0x75}},