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Results 1 - 10 of 12 for art4 (0.07 sec)

  1. tensorflow/compiler/mlir/lite/tests/ops.mlir

      ^bb0(%arg3: tensor<*xi32>, %arg4: tensor<1xf32>, %arg5: tensor<2xf32>):
        %1 = func.call @WhileOp_cond(%arg3, %arg4, %arg5) : (tensor<*xi32>, tensor<1xf32>, tensor<2xf32>) -> tensor<i1>
        "tfl.yield"(%1) : (tensor<i1>) -> ()
      },  {
      ^bb0(%arg3: tensor<*xi32>, %arg4: tensor<2xf32>, %arg5: tensor<1xf32>):
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Jun 06 19:09:08 UTC 2024
    - 189.2K bytes
    - Viewed (0)
  2. tensorflow/compiler/mlir/lite/tests/prepare-composite-functions-tf.mlir

      %0 = "tf.Const"() {_output_shapes = ["tfshape$"], device = "", dtype = f32, value = dense<0.000000e+00> : tensor<f32>} : () -> tensor<f32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 02 09:41:17 UTC 2024
    - 122.1K bytes
    - Viewed (0)
  3. tensorflow/compiler/mlir/tensorflow/tests/shape_inference.mlir

      // CHECK-SAME: -> (tensor<64xi32>, tensor<69xi32>, tensor<10xi32>)
      func.func private @__inference_Dataset_map_lambda_96150(%arg0: tensor<?xi32>, %arg1: tensor<?xi32>, %arg2: tensor<?xi32>, %arg3: tensor<?xi64>, %arg4: tensor<i32>, %arg5: tensor<i32>, %arg6: tensor<f32>, %arg7: tensor<i64>, %arg8: tensor<?xi32>, %arg9: tensor<?xi32>, %arg10: tensor<i32>, %arg11: tensor<f32>, %arg12: tensor<*xi32>) -> (tensor<*xi32>, tensor<*xi32>, tensor<*xi32>) {
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue Jan 23 17:24:10 UTC 2024
    - 167.4K bytes
    - Viewed (0)
  4. tensorflow/compiler/mlir/lite/tests/legalize-tf.mlir

    }
    
    func.func @non_max_suppression_v4_no_pad(%arg0: tensor<3x4xf32>, %arg1: tensor<3xf32>, %arg2: tensor<i32>, %arg3: tensor<f32>, %arg4: tensor<f32>) -> tensor<2xi32> {
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed Jun 05 01:54:33 UTC 2024
    - 153.4K bytes
    - Viewed (0)
  5. okhttp/src/test/resources/okhttp3/internal/publicsuffix/public_suffix_list.dat

    aramco
    
    // archi : 2014-02-06 Identity Digital Limited
    archi
    
    // army : 2014-03-06 Dog Beach, LLC
    army
    
    // art : 2016-03-24 UK Creative Ideas Limited
    art
    
    // arte : 2014-12-11 Association Relative à la Télévision Européenne G.E.I.E.
    arte
    
    // asda : 2015-07-31 Wal-Mart Stores, Inc.
    asda
    
    // associates : 2014-03-06 Binky Moon, LLC
    associates
    
    Registered: Sun Jun 16 04:42:17 UTC 2024
    - Last Modified: Wed Dec 20 23:27:07 UTC 2023
    - 240.3K bytes
    - Viewed (0)
  6. tensorflow/compiler/mlir/tensorflow/tests/canonicalize.mlir

          "tf.Yield"(%10) : (tensor<i1>) -> ()
        },  {
        ^bb0(%arg1: tensor<i32>, %arg2: tensor<i32>, %arg3: tensor<?xf32>, %arg4: tensor<1xi32>):
          %8 = "tf.Identity"(%arg4) {device = ""} : (tensor<1xi32>) -> tensor<1xi32>
          // CHECK: tf.RandomStandardNormal{{.*}}(%[[SHAPE]])
          %9 = "tf.RandomStandardNormal"(%arg4) {device = "", seed = 87654321 : i64, seed2 = 0 : i64} : (tensor<1xi32>) -> tensor<?xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 09 22:07:10 UTC 2024
    - 132.1K bytes
    - Viewed (0)
  7. tensorflow/compiler/mlir/tensorflow/tests/tf-ops.mlir

    ^bb0(%arg0: tensor<8x8x8x8xf32>, %arg1: tensor<8xf32>, %arg2: tensor<8xf32>, %arg3: tensor<8xf32>, %arg4: tensor<8xf32>):
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 23 14:40:35 UTC 2023
    - 236.4K bytes
    - Viewed (0)
  8. src/cmd/vendor/rsc.io/markdown/emoji.go

    	"arrow_upper_left":                     "\u2196\ufe0f",
    	"arrow_upper_right":                    "\u2197\ufe0f",
    	"arrows_clockwise":                     "\U0001f503",
    	"arrows_counterclockwise":              "\U0001f504",
    	"art":                                  "\U0001f3a8",
    	"articulated_lorry":                    "\U0001f69b",
    	"artificial_satellite":                 "\U0001f6f0\ufe0f",
    	"artist":                               "\U0001f9d1\u200d\U0001f3a8",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Jan 24 13:01:26 UTC 2024
    - 107.7K bytes
    - Viewed (0)
  9. tensorflow/compiler/mlir/lite/stablehlo/tests/uniform-quantized-stablehlo-to-tfl.mlir

      %0, %1 = "stablehlo.reduce_window"(%arg0, %arg1, %arg2, %arg3) ({
      ^bb0(%arg4: tensor<!quant.uniform<i8:f32, 3.000000e-01:-5>>, %arg5: tensor<!quant.uniform<i8:f32, 3.000000e-01:-5>>, %arg6: tensor<!quant.uniform<i8:f32, 3.000000e-01:-5>>, %arg7: tensor<!quant.uniform<i8:f32, 3.000000e-01:-5>>):
        %2 = stablehlo.maximum %arg4, %arg5 : tensor<!quant.uniform<i8:f32, 3.000000e-01:-5>>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue May 14 17:10:32 UTC 2024
    - 106.2K bytes
    - Viewed (0)
  10. tensorflow/compiler/mlir/tensorflow/tests/tpu_rewrite.mlir

      func.func @parallel_execute_with_input_with_sharding_configurations(%arg0: tensor<8xi32>, %arg1: tensor<8xi32>, %arg2: tensor<*xi1>, %arg3: tensor<*xi1>, %arg4: tensor<*xi32>, %arg5: tensor<*xi32>) -> (tensor<8xi32>, tensor<8xi32>) {
        // CHECK: tf_device.replicate
        // CHECK-SAME: [%[[ARG_0]], %[[ARG_1]]] as %[[RI_0:[a-z0-9]*]]: tensor<8xi32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 02 22:03:30 UTC 2024
    - 172.9K bytes
    - Viewed (0)
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