// 4 workers. This was measured on the following machines.
//
// * MacBookPro with a 4-core Intel Core i7 CPU
// * Linux workstation with 6-core Intel Xeon CPU
// * Linux workstation with 24-core Intel Xeon CPU
//
// It is very likely (though not confirmed) that this workload is limited
// by memory bandwidth. We don't have a good way to determine the number of

(ORN x0 x1:(RORconst [c] y)) && clobberIfDead(x1) => (ORNshiftRO x0 y [c])
(EON x0 x1:(SLLconst [c] y)) && clobberIfDead(x1) => (EONshiftLL x0 y [c])
(EON x0 x1:(SRLconst [c] y)) && clobberIfDead(x1) => (EONshiftRL x0 y [c])
(EON x0 x1:(SRAconst [c] y)) && clobberIfDead(x1) => (EONshiftRA x0 y [c])
(EON x0 x1:(RORconst [c] y)) && clobberIfDead(x1) => (EONshiftRO x0 y [c])

	// DSB <option>|<imm>
	{0xfffff0ff, 0xd503309f, DSB, instArgs{arg_option_DSB_BO_system_CRm}, nil},
	// EON <Wd>, <Wn>, <Wm> {, <shift> #<amount> }
	{0xff208000, 0x4a200000, EON, instArgs{arg_Wd, arg_Wn, arg_Wm_shift__LSL_0__LSR_1__ASR_2__ROR_3__0_31}, nil},
	// EON <Xd>, <Xn>, <Xm> {, <shift> #<amount> }
	{0xff200000, 0xca200000, EON, instArgs{arg_Xd, arg_Xn, arg_Xm_shift__LSL_0__LSR_1__ASR_2__ROR_3__0_63}, nil},
	// EOR <Wd|WSP>, <Wn>, #<imm>

	switch op {
	case ASTXP, ASTLXP, ASTXPW, ASTLXPW:
		return true
	}
	return false
}

func isANDop(op obj.As) bool {
	switch op {
	case AAND, AORR, AEOR, AANDS, ATST,
		ABIC, AEON, AORN, ABICS:
		return true
	}
	return false
}

func isANDWop(op obj.As) bool {
	switch op {
	case AANDW, AORRW, AEORW, AANDSW, ATSTW,
		ABICW, AEONW, AORNW, ABICSW:
		return true

{"Name":"EON (shifted register)","Bits":"0|1|0|0|1|0|1|0|shift:2|1|Rm:5|imm6:6|Rn:5|Rd:5","Arch":"32-bit variant","Syntax":"EON <Wd>, <Wn>, <Wm>{, <shift> #<amount>}","Code":"","Alias":""},
{"Name":"EON (shifted register)","Bits":"1|1|0|0|1|0|1|0|shift:2|1|Rm:5|imm6:6|Rn:5|Rd:5","Arch":"64-bit variant","Syntax":"EON <Xd>, <Xn>, <Xm>{, <shift> #<amount>}","Code":"","Alias":""},