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Results 1 - 3 of 3 for RegSize (0.15 sec)
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src/cmd/compile/internal/ssa/_gen/generic.rules
(Div16u x (Const16 [c])) && umagicOK16(c) && config.RegSize == 8 => (Trunc64to16 (Rsh64Ux64 <typ.UInt64> (Mul64 <typ.UInt64> (Const64 <typ.UInt64> [int64(1<<16+umagic16(c).m)]) (ZeroExt16to64 x)) (Const64 <typ.UInt64> [16+umagic16(c).s]))) // For 16-bit divides on 32-bit machines (Div16u x (Const16 [c])) && umagicOK16(c) && config.RegSize == 4 && umagic16(c).m&1 == 0 => (Trunc32to16
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 16 22:21:05 UTC 2024 - 135.3K bytes - Viewed (0) -
src/cmd/internal/obj/x86/asm6.go
if ctxt.Arch.Family != sys.AMD64 { ctxt.Diag("asmins: illegal in %d-bit mode: %v", ctxt.Arch.RegSize*8, p) } case Py1: // 64-bit only if z < 1, no prefix if z < 1 && ctxt.Arch.Family != sys.AMD64 { ctxt.Diag("asmins: illegal in %d-bit mode: %v", ctxt.Arch.RegSize*8, p) } case Py3: // 64-bit only if z < 3, no prefix if z < 3 && ctxt.Arch.Family != sys.AMD64 {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 15:44:14 UTC 2024 - 146.9K bytes - Viewed (0) -
src/cmd/link/internal/ld/data.go
// Setting the alignment explicitly prevents // symalign from basing it on the size and // getting it wrong. ldr.SetSymAlign(rel, int32(ctxt.Arch.RegSize)) ldr.SetSymAlign(plt, int32(ctxt.Arch.RegSize)) } state.data[sym.SELFROSECT] = syms } if ctxt.HeadType == objabi.Haix && ctxt.LinkMode == LinkExternal { // These symbols must have the same alignment as their section.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Jun 12 15:10:50 UTC 2024 - 100.5K bytes - Viewed (1)