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Results 1 - 3 of 3 for RELU_N1_TO_1 (0.42 sec)

  1. tensorflow/compiler/mlir/lite/tests/ops.mlir

      // CHECK: "RELU"
      %1 = tfl.add %arg0, %arg1 {fused_activation_function = "RELU"} : tensor<4xi32>
      // CHECK: "RELU_N1_TO_1"
      %2 = tfl.add %arg0, %arg1 {fused_activation_function = "RELU_N1_TO_1"} : tensor<4xi32>
      // CHECK: "RELU6"
      %3 = tfl.add %arg0, %arg1 {fused_activation_function = "RELU6"} : tensor<4xi32>
      // CHECK: "TANH"
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Jun 06 19:09:08 UTC 2024
    - 189.2K bytes
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  2. tensorflow/compiler/mlir/lite/transforms/optimize.cc

    namespace {
    #define GEN_PASS_DEF_OPTIMIZEPASS
    #include "tensorflow/compiler/mlir/lite/transforms/passes.h.inc"
    
    constexpr char kRelu[] = "RELU";
    constexpr char kRelu6[] = "RELU6";
    constexpr char kRelu1[] = "RELU_N1_TO_1";
    
    ElementsAttr FlattenTo1D(Attribute a) {
      auto elements = mlir::cast<DenseElementsAttr>(a);
      const std::array<int64_t, 1> flattened_shape = {elements.getNumElements()};
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue Apr 30 00:40:15 UTC 2024
    - 102.3K bytes
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  3. tensorflow/compiler/mlir/lite/ir/tfl_ops.td

          x -> max(0, min(1, x))
      }];
    
      let arguments = (ins TFL_TensorOf<[F32, QUI8, QI8]>:$x);
    
      let results = (outs TFL_TensorOf<[F32, QUI8, QI8]>:$y);
    }
    
    def TFL_Relu1Op: TFL_Op<"relu_n1_to_1", [
        PredOpTrait<"x and y must have same element type",
          TFL_TCresVTEtIsSameAsOp<0, 0>>,
        Pure,
        QuantizableResult,
        SameOperandsAndResultShape]> {
      let summary = "Relu1 operator";
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Jun 06 19:09:08 UTC 2024
    - 186K bytes
    - Viewed (0)
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