// CSNEG <Wd>, <Wn>, <Wm>, <cond>
	{0xffe00c00, 0x5a800400, CSNEG, instArgs{arg_Wd, arg_Wn, arg_Wm, arg_cond_AllowALNV_Normal}, nil},
	// CNEG <Xd>, <Xn>, <cond>
	{0xffe00c00, 0xda800400, CNEG, instArgs{arg_Xd, arg_Xn, arg_cond_NotAllowALNV_Invert}, cneg_csneg_64_condsel_cond},
	// CSNEG <Xd>, <Xn>, <Xm>, <cond>

(CSEL [cc] x (MVN a) flag) => (CSINV [cc] x a flag)
(CSEL [cc] (MVN a) x flag) => (CSINV [arm64Negate(cc)] x a flag)
(CSEL [cc] x (NEG a) flag) => (CSNEG [cc] x a flag)
(CSEL [cc] (NEG a) x flag) => (CSNEG [arm64Negate(cc)] x a flag)

(SUB x (SUB y z)) => (SUB (ADD <v.Type> x z) y)
(SUB (SUB x y) z) => (SUB x (ADD <y.Type> y z))

// remove redundant *const ops
(ADDconst [0]  x) => x

{"Name":"CSNEG","Bits":"0|1|0|1|1|0|1|0|1|0|0|Rm:5|cond:4|0|1|Rn:5|Rd:5","Arch":"32-bit variant","Syntax":"CSNEG <Wd>, <Wn>, <Wm>, <cond>","Code":"","Alias":"This instruction is used by the alias CNEG."},
{"Name":"CSNEG","Bits":"1|1|0|1|1|0|1|0|1|0|0|Rm:5|cond:4|0|1|Rn:5|Rd:5","Arch":"64-bit variant","Syntax":"CSNEG <Xd>, <Xn>, <Xm>, <cond>","Code":"","Alias":"This instruction is used by the alias CNEG."},