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Results 1 - 2 of 2 for m4 (0.08 sec)
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src/cmd/internal/obj/s390x/asmz.go
m4 := singleElementMask(p.As) zVRRa(op, uint32(p.From.Reg), uint32(p.To.Reg), m5, m4, m3, asm) case 117: // VRR-b op, m4, m5 := vop(p.As) zVRRb(op, uint32(p.To.Reg), uint32(p.From.Reg), uint32(p.Reg), m5, m4, asm) case 118: // VRR-c op, m4, m6 := vop(p.As) m5 := singleElementMask(p.As) v3 := p.Reg if v3 == 0 { v3 = p.To.Reg }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 16 17:46:09 UTC 2024 - 176.7K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/generic.rules
m2:(Store {t2} op2:(OffPtr [o2] p2) d2 m3:(Store {t3} op3:(OffPtr [0] p3) d3 m4:(Move [n] p4 _ mem)))) && m2.Uses == 1 && m3.Uses == 1 && m4.Uses == 1 && o2 == t3.Size() && o1-o2 == t2.Size() && n == t3.Size() + t2.Size() + t1.Size() && isSamePtr(p1, p2) && isSamePtr(p2, p3) && isSamePtr(p3, p4) && clobber(m2, m3, m4) => (Store {t1} op1 d1 (Store {t2} op2 d2 (Store {t3} op3 d3 mem)))
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 16 22:21:05 UTC 2024 - 135.3K bytes - Viewed (0)