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Results 1 - 9 of 9 for udivisible (0.21 sec)
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src/cmd/compile/internal/ssa/_gen/generic.rules
=> (Leq8U (RotateLeft8 <typ.UInt8> (Add8 <typ.UInt8> (Mul8 <typ.UInt8> (Const8 <typ.UInt8> [int8(sdivisible8(c).m)]) x) (Const8 <typ.UInt8> [int8(sdivisible8(c).a)]) ) (Const8 <typ.UInt8> [int8(8-sdivisible8(c).k)]) ) (Const8 <typ.UInt8> [int8(sdivisible8(c).max)]) ) (Eq16 x (Mul16 (Const16 [c]) (Sub16 (Rsh32x64 mul:(Mul32
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 16 22:21:05 UTC 2024 - 135.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/ir/tf_ops_a_m.cc
if (input_batch != ShapedType::kDynamic && input_batch % (block_size * block_size) != 0) { return op.emitOpError() << "requires input batch (dimension 0) to be evenly divisible " "by (block_size * block_size), but got input batch " << input_batch << " and block_size " << block_size; } input_shape.assign(input_type.getShape().begin(),
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 146.7K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/extract_outside_compilation.mlir
return } // Test that map_outside_compilation's inputs shapes are divisible by num_cores_per_replica. func.func @map_outside_compilation_div_num_cores_per_replica() -> () { "tf_device.cluster"() ({ %0 = "tf.OpA"() : () -> tensor<3xi64> // expected-error @+1 {{divisible by num_cores_per_replica}}
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Oct 31 08:59:10 UTC 2023 - 129.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/transforms/shape_inference.cc
<< kernel_output_features << ") to be divisible by " << "feature_group_count (value " << feature_group_count_val << ").\n"; } if (input_batch % batch_group_count != 0) { return op.emitOpError() << "Expected input batch dimension (value " << input_batch << " ) to be divisible by batch_group_count (value "
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Sat Jun 08 07:28:49 UTC 2024 - 134.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/tf-ops.mlir
} // ----- func.func @testConv2D(%arg0: tensor<256x32x32x3xf32>, %arg1: tensor<3x3x2x16xf32>) -> tensor<256x32x32x16xf32> { // expected-error @+1 {{requires the number of input channels to be divisible by the number of filter input channels; found 3 and 2, respectively}} %0 = "tf.Conv2D"(%arg0, %arg1) {padding = "SAME", strides = [1, 1, 1, 1]} : (tensor<256x32x32x3xf32>, tensor<3x3x2x16xf32>) -> tensor<256x32x32x16xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 23 14:40:35 UTC 2023 - 236.4K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/ir/tf_ops_n_z.cc
if (op.getNumResults() == 0) return failure(); if (input_dim_size % op.getNumResults() != 0) return op.emitOpError("dimension #") << *dim_index << " not divisible by the number of result tensors"; return success(); } //===----------------------------------------------------------------------===// // SplitVOp
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 09 22:07:10 UTC 2024 - 170.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/tpu_rewrite.mlir
// expected-error@+1 {{incorrect input sharding configuration received. 1-th dimension of the input must be evenly divisible by 4}}
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 02 22:03:30 UTC 2024 - 172.9K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/shape_inference.mlir
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Jan 23 17:24:10 UTC 2024 - 167.4K bytes - Viewed (0) -
doc/go1.17_spec.html
func generate(ch chan<- int) { for i := 2; ; i++ { ch <- i // Send 'i' to channel 'ch'. } } // Copy the values from channel 'src' to channel 'dst', // removing those divisible by 'prime'. func filter(src <-chan int, dst chan<- int, prime int) { for i := range src { // Loop over values received from 'src'. if i%prime != 0 { dst <- i // Send 'i' to channel 'dst'. }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Apr 11 20:22:45 UTC 2024 - 211.6K bytes - Viewed (0)