- Sort Score
- Result 10 results
- Languages All
Results 1 - 2 of 2 for op2 (0.09 sec)
-
src/cmd/compile/internal/ssa/_gen/generic.rules
(Store {t1} op1:(OffPtr [o1] p1) d1 m2:(Store {t2} op2:(OffPtr [0] p2) d2 m3:(Move [n] p3 _ mem))) && m2.Uses == 1 && m3.Uses == 1 && o1 == t2.Size() && n == t2.Size() + t1.Size() && isSamePtr(p1, p2) && isSamePtr(p2, p3) && clobber(m2, m3) => (Store {t1} op1 d1 (Store {t2} op2 d2 mem)) (Store {t1} op1:(OffPtr [o1] p1) d1 m2:(Store {t2} op2:(OffPtr [o2] p2) d2 m3:(Store {t3} op3:(OffPtr [0] p3) d3
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 16 22:21:05 UTC 2024 - 135.3K bytes - Viewed (0) -
src/cmd/internal/obj/arm64/asm7.go
return n } /* form offset parameter to SYS; special register number */ func SYSARG5(op0 int, op1 int, Cn int, Cm int, op2 int) int { return op0<<19 | op1<<16 | Cn<<12 | Cm<<8 | op2<<5 } func SYSARG4(op1 int, Cn int, Cm int, op2 int) int { return SYSARG5(0, op1, Cn, Cm, op2) } // checkUnpredictable checks if the source and transfer registers are the same register.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 15:44:14 UTC 2024 - 201.1K bytes - Viewed (0)