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src/cmd/compile/internal/ssa/_gen/ARM64.rules
// Prefetch instructions (aux is option: 0 - PLDL1KEEP; 1 - PLDL1STRM) (PrefetchCache addr mem) => (PRFM [0] addr mem) (PrefetchCacheStreamed addr mem) => (PRFM [1] addr mem) // Arch-specific inlining for small or disjoint runtime.memmove (SelectN [0] call:(CALLstatic {sym} s1:(MOVDstore _ (MOVDconst [sz]) s2:(MOVDstore _ src s3:(MOVDstore {t} _ dst mem))))) && sz >= 0 && isSameCall(sym, "runtime.memmove")
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 113.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/generic.rules
// that an And cleared, we can skip the And. // This happens in bitmasking code like: // x &^= 3 << shift // clear two old bits // x |= v << shift // set two new bits // when shift is a small constant and v ends up a constant 3. (Or8 (And8 x (Const8 [c2])) (Const8 <t> [c1])) && ^(c1 | c2) == 0 => (Or8 (Const8 <t> [c1]) x)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 16 22:21:05 UTC 2024 - 135.3K bytes - Viewed (0)