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Results 1 - 10 of 23 for isF32 (0.03 sec)
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tensorflow/compiler/mlir/lite/transforms/legalize_tensorlist.cc
if (HasVariantInputOrOutput(op)) { std::optional<mlir::Type> element_type = GetSingularVariantBaseType(op->getOperand(0)); if (element_type.has_value()) { return element_type->isF32() || element_type->isInteger(32); } } } // Op is vacuously "supported" if it is not a tensorlist op. StringRef op_name = op->getName().getStringRef();
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue May 07 23:04:40 UTC 2024 - 10.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/common/uniform_quantized_types_test.cc
CreateI8F32UniformQuantizedType(UnknownLoc::get(&ctx_), ctx_, /*scale=*/1.0, /*zero_point=*/0); EXPECT_TRUE(quantized_type.getExpressedType().isF32()); } TEST_F(CreateI8F32UniformQuantizedTypeTest, SignedQuantizedTypeSucceeds) { const UniformQuantizedType quantized_type = CreateI8F32UniformQuantizedType(UnknownLoc::get(&ctx_), ctx_,
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 28.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/stablehlo/passes/quantization_patterns.h
if (auto dq_op = dyn_cast_or_null<DequantizeOpT>(operand.getDefiningOp())) { inputs.push_back(dq_op.getOperand()); } else if (!ele_type.isF32()) { // If the operand is an integer tensor, then it doesn't require the // DequantizeOp in the pattern. inputs.push_back(operand); } else if (weight_only_quantizable) {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 10.9K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/transforms/while_loop_outline.cc
} bool IsCompatibleTypeWithTFLCastOp(Type type) { auto elemType = getElementTypeOrSelf(type); // F16, F32, F64, BF16 types are allowed. if (elemType.isBF16() || elemType.isF16() || elemType.isF32() || elemType.isF64()) return true; // I1, I4, I8, I16, I32, I64 types are allowed. if (elemType.isInteger(1) || elemType.isInteger(4) || elemType.isInteger(8) ||
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 11.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/transforms/dense_to_sparse.cc
std::vector<int> b_size = {}; std::vector<int> b_map = {}; PopulateEncodingParams(block_size, &traversal_order, &format, &b_map, &b_size); if (type.getElementType().isF32()) { tflite::internal::sparsity::FormatConverter<float> format_converter( shape, traversal_order, format, b_size, b_map); std::vector<float> data; data.reserve(type.getNumElements());
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 16.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/transforms/fused_kernel_matcher.cc
<< ")"; }); return false; } // Verify the data type is supported. Type element_ty = getElementTypeOrSelf(conv.getType()); if (!element_ty.isF32() && !element_ty.isF64()) { (void)rewriter.notifyMatchFailure(conv, [&](Diagnostic &diag) { diag << "supported data types for _FusedConv2D are float and double, " << " but got " << element_ty;
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 14.9K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/passes/quantize.cc
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri Mar 22 05:52:39 UTC 2024 - 23.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/stablehlo/passes/quantize_weight.cc
// Non-float tensors do not need quantization. QuantizationUnits quantizable_ops; const ShapedType type = mlir::dyn_cast<ShapedType>(op.getType()); if (!type || !type.getElementType().isF32()) return quantizable_ops; const Value value = op.getResult(); for (OpOperand& use : value.getUses()) { Operation* user = use.getOwner(); const int operand_num = use.getOperandNumber();
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 9.9K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/utils/lstm_utils_test.cc
EXPECT_TRUE(mlir::isa<NoneType>(it->getOperand(20).getType())); // proj_bias is F32 EXPECT_TRUE(mlir::cast<RankedTensorType>(it->getOperand(17).getType()) .getElementType() .isF32()); // output gate bias is 0 since it is out of bounds of the bias tensor, so // we set its value as a const tensor of specified size and value 0. EXPECT_TRUE(
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 10K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/passes/prepare_quantize_drq.cc
QuantizationUnits& quantizable_ops) const { // Non-float tensors do not need quantization. auto type = mlir::dyn_cast<ShapedType>(op.getType()); if (!type || !type.getElementType().isF32()) return false; Value value = op.getResult(); // Check whether dynamic range quantization can be applied. for (auto& use : value.getUses()) { Operation* user = use.getOwner();
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 11.5K bytes - Viewed (0)