return &inst{0x2f, 0x2, 0x0, -512, 0x70}
	case AAMOMIND:
		return &inst{0x2f, 0x3, 0x0, -2048, 0x40}
	case AAMOMINW:
		return &inst{0x2f, 0x2, 0x0, -2048, 0x40}
	case AAMOMINUD:
		return &inst{0x2f, 0x3, 0x0, -1024, 0x60}
	case AAMOMINUW:
		return &inst{0x2f, 0x2, 0x0, -1024, 0x60}
	case AAMOORD:
		return &inst{0x2f, 0x3, 0x0, 1024, 0x20}
	case AAMOORW:
		return &inst{0x2f, 0x2, 0x0, 1024, 0x20}
	case AAMOSWAPD:

		if isMem(inst.Args[0]) {
			unmarkImplicit(&inst, PrefixDataSize)
		}

	case SYSEXIT:
		unmarkImplicit(&inst, PrefixDataSize)
	}

	if isCondJmp[inst.Op] || isLoop[inst.Op] || inst.Op == JCXZ || inst.Op == JECXZ || inst.Op == JRCXZ {
		if countPrefix(&inst, PrefixCS) > 0 && countPrefix(&inst, PrefixDS) > 0 {
			for i, p := range inst.Prefix {
				switch p & 0xFFF {

 *
 * @author Kevin Bourrillion
 * @since 1.0
 */
@GwtCompatible(emulated = true)
@ElementTypesAreNonnullByDefault
public final class Ints extends IntsMethodsForWeb {
  private Ints() {}

  /**
   * The number of bytes required to represent a primitive {@code int} value.
   *
   * <p><b>Java 8+ users:</b> use {@link Integer#BYTES} instead.
   */

// license that can be found in the LICENSE file.

// Package x86asm implements decoding of x86 machine code.
package x86asm

import (
	"bytes"
	"fmt"
)

// An Inst is a single instruction.
type Inst struct {
	Prefix   Prefixes // Prefixes applied to the instruction.
	Op       Op       // Opcode mnemonic
	Opcode   uint32   // Encoded opcode bits, left aligned (first byte is Opcode>>24, etc)

ines-course.jpg...

 *
 * @author Kevin Bourrillion
 * @since 1.0
 */
@GwtCompatible(emulated = true)
@ElementTypesAreNonnullByDefault
public final class Ints extends IntsMethodsForWeb {
  private Ints() {}

  /**
   * The number of bytes required to represent a primitive {@code int} value.
   *
   * <p><b>Java 8+ users:</b> use {@link Integer#BYTES} instead.
   */

	if op >= Op(len(opstr)) || opstr[op] == "" {
		return fmt.Sprintf("Op(%d)", int(op))
	}
	return opstr[op]
}

// An Inst is a single instruction.
type Inst struct {
	Op   Op     // Opcode mnemonic
	Enc  uint32 // Raw encoding bits.
	Args Args   // Instruction arguments, in ARM manual order.
}

func (i Inst) String() string {
	var args []string
	for _, arg := range i.Args {
		if arg == nil {
			break
		}

	if inst.Op == XCHG && inst.Opcode>>24 == 0x90 {
		if inst.Args[0] == RAX || inst.Args[0] == EAX || inst.Args[0] == AX {
			inst.Op = NOP
			if dataSizeIndex >= 0 {
				inst.Prefix[dataSizeIndex] &^= PrefixImplicit
			}
			inst.Args[0] = nil
			inst.Args[1] = nil
		}
		if repIndex >= 0 && inst.Prefix[repIndex] == 0xF3 {
			inst.Prefix[repIndex] |= PrefixImplicit

				inst.Prefix[i] |= PrefixImplicit
			}
			if p.IsVEX() {
				if p == PrefixVEX3Bytes {
					inst.Prefix[i+2] |= PrefixImplicit
				}
				inst.Prefix[i] |= PrefixImplicit
				inst.Prefix[i+1] |= PrefixImplicit
			}
		}
	}

	if isLoop[inst.Op] || inst.Op == JCXZ || inst.Op == JECXZ || inst.Op == JRCXZ {
		for i, p := range inst.Prefix {
			if p == PrefixPT || p == PrefixPN {
				inst.Prefix[i] |= PrefixImplicit

			if matchArg {
				inst.Out, inst.Arg = inst.Arg, inst.Out
				matchOut, matchArg = matchArg, matchOut
			}
			if matchOut {
				m[pc] = true
				inst.Op = syntax.InstAltMatch
			}

			// build a dispatch operator from the two legs of the alt.
			onePassRunes[pc], inst.Next = mergeRuneSets(
				&onePassRunes[inst.Out], &onePassRunes[inst.Arg], inst.Out, inst.Arg)