int end;
    int insert;
  };

  // Gives the peak memory location and size after inserting operations
  // according to `remat` (but doesn't actually insert them.)  Ties are broken
  // towards later locations. `remat` must be valid (see above).
  MemSpec GetPeakMemory(const RematSpec& remat = {}) const;

  // Gives memory profile after inserting operations according to `remat` (but

  let summary = "Converts stablehlo.convolution op of NCHW format to -> NHWC.";
  let description = [{
    Matches `ConvolutionOp`s with NCHW format and converts it to NHWC
    format by inserting `TransposeOp`s to input, filter, and output tensors.
    In terms of dimension numbers, this matches
    `[b, f, 0, 1]x[o, i, 0, 1]->[b, f, 0, 1]` format and converts it to
    `[b, 0, 1, f]x[0, 1, i, o]->[b, 0, 1, f]` format.

    if (!(getQuantizableOps(op, quantizable_ops))) {
      return failure();
    }

    // 2. Quantize collected ops. It is immediately quantized by inserting Q-DQ
    // pair for int8 while it is lazily applied for float16 by inserting CastOp.
    if (!(quantizeOps(rewriter, op, quantizable_ops))) {
      return failure();
    }

    // 3. Apply post-processing required for each inference type.

                        entry.map.put(domain, new HashMap<String, CacheEntry<DfsReferralDataInternal>>());
                        if ( log.isTraceEnabled() ) {
                            log.trace("Inserting cache entry for domain " + domain + ": " + dr);
                        }
                        dr = dr.next();
                    }
                    while ( dr != start );

// naming conflicts. But we need to rename the function calls inside the
// stablehlo functions as well. So we first do this renaming in the stablehlo
// module itself without inserting into the tf module.
FailureOr<StringAttr> RenameStablehloFunctions(
    MLIRContext *context, SymbolTableCollection &symbol_tables,
    ModuleOp tf_module, ModuleOp stablehlo_module) {

    // 1. Collect quantizable ops.
    if (!(getQuantizableOps(op, quantizable_ops))) {
      return failure();
    }

    // 2. Quantize collected ops. It is immediately quantized by inserting Q-DQ
    // pair for int8.
    if (!(quantizeOps(rewriter, op, quantizable_ops))) {
      return failure();
    }

    return success();
  }

 private:

      yield_op->getOperands().take_front(num_loop_carried);
  args.reserve(loop_carried_yield_operands.size() + new_args.size());
  if (passthru_extra_args) {
    // Add operands of yield to the return, inserting casts if needed.
    for (auto it : llvm::zip_first(loop_carried_yield_operands, types)) {
      auto value = std::get<0>(it);
      auto type = std::get<1>(it);
      if (value.getType() == type) {

const (
	R_ADDR RelocType = 1 + iota
	// R_ADDRPOWER relocates a pair of "D-form" instructions (instructions with 16-bit
	// immediates in the low half of the instruction word), usually addis followed by
	// another add or a load, inserting the "high adjusted" 16 bits of the address of
	// the referenced symbol into the immediate field of the first instruction and the
	// low 16 bits into that of the second instruction.
	R_ADDRPOWER

  // Now iterate through the blocks, reading them one at a time.
  for (size_t pos = start; pos < finish; pos += block_size_) {
    Key key = std::make_pair(filename, pos);
    // Look up the block, fetching and inserting it if necessary, and update the
    // LRU iterator for the key and block.
    std::shared_ptr<Block> block = Lookup(key);
    if (!block) {
      std::cerr << "No block for key " << key.first << "@" << key.second;

	var n *node[K, V]
	for {
		// Find the key or a candidate location for insertion.
		i = ht.root
		hashShift = 8 * goarch.PtrSize
		haveInsertPoint := false
		for hashShift != 0 {
			hashShift -= nChildrenLog2

			slot = &i.children[(hash>>hashShift)&nChildrenMask]
			n = slot.Load()
			if n == nil {
				// We found a nil slot which is a candidate for insertion.
				haveInsertPoint = true
				break
			}
			if n.isEntry {