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Results 1 - 3 of 3 for clkw (0.01 sec)
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src/cmd/asm/internal/asm/testdata/riscv64validation.s
CFSDSP F10, 36(SP) // ERROR "must be a multiple of 8" CLW 20(X10), F11 // ERROR "expected integer prime register in rd position" CLW 20(X5), X11 // ERROR "expected integer prime register in rs1 position" CLW 20(X10), X5 // ERROR "expected integer prime register in rd position" CLW -1(X10), X11 // ERROR "must be in range [0, 127]" CLW 22(X10), X11 // ERROR "must be a multiple of 4" CLW 128(X10), X11 // ERROR "must be in range [0, 127]"
Registered: Tue Dec 30 11:13:12 UTC 2025 - Last Modified: Thu Nov 13 12:17:37 UTC 2025 - 42.1K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm64enc.s
CINV VS, R30, R30 // de739eda CLREX $4 // 5f3403d5 CLREX $0 // 5f3003d5 CLSW R15, R6 // e615c05a CLS R15, ZR // ff15c0da CLZW R1, R14 // 2e10c05a CLZ R21, R9 // a912c0da CMNW R21.UXTB<<4, R15 // ff11352b
Registered: Tue Dec 30 11:13:12 UTC 2025 - Last Modified: Mon Jul 24 01:11:41 UTC 2023 - 43.9K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/loong64enc1.s
SRA R4, R5, R6 // a6101800 ROTR R4, R5 // a5101b00 ROTR R4, R5, R6 // a6101b00 SLLV R4, R5 // a5901800 SLLV R4, R5, R6 // a6901800 ROTRV R4, R5 // a5901b00 ROTRV R4, R5, R6 // a6901b00 CLOW R4, R5 // 85100000 CLZW R4, R5 // 85140000 CTOW R4, R5 // 85180000 CTZW R4, R5 // 851c0000 CLOV R4, R5 // 85200000 CLZV R4, R5 // 85240000 CTOV R4, R5 // 85280000 CTZV R4, R5 // 852c0000
Registered: Tue Dec 30 11:13:12 UTC 2025 - Last Modified: Thu Nov 27 00:46:52 UTC 2025 - 44.5K bytes - Viewed (0)