VPMADD52HUQ -7(DI)(R8*4), X31, K1, X18             // 62a28501b59487f9ffffff
	VPMADD52HUQ X7, X3, K1, X18                        // 62e2e509b5d7
	VPMADD52HUQ X0, X3, K1, X18                        // 62e2e509b5d0
	VPMADD52HUQ 17(SP)(BP*2), X3, K1, X18              // 62e2e509b5946c11000000
	VPMADD52HUQ -7(DI)(R8*4), X3, K1, X18              // 62a2e509b59487f9ffffff
	VPMADD52HUQ X7, X11, K1, X21                       // 62e2a509b5ef

	VROTRV		V1, V2, V3	// 4384ef70
	XVSLLB		X3, X2, X1	// 410ce874
	XVSLLH		X3, X2, X1	// 418ce874
	XVSLLW		X3, X2, X1	// 410ce974
	XVSLLV		X3, X2, X1	// 418ce974
	XVSRLB		X3, X2, X1	// 410cea74
	XVSRLH		X3, X2, X1	// 418cea74
	XVSRLW		X3, X2, X1	// 410ceb74
	XVSRLV		X3, X2, X1	// 418ceb74
	XVSRAB		X3, X2, X1	// 410cec74
	XVSRAH		X3, X2, X1	// 418cec74
	XVSRAW		X3, X2, X1	// 410ced74
	XVSRAV		X3, X2, X1	// 418ced74

	VPDPWSSDS X12, X15, K2, X3                         // 62d2050a53dc
	VPDPWSSDS 17(SP)(BP*8), X15, K2, X3                // 62f2050a539cec11000000
	VPDPWSSDS 17(SP)(BP*4), X15, K2, X3                // 62f2050a539cac11000000
	VPDPWSSDS X13, X30, K2, X3                         // 62d20d0253dd
	VPDPWSSDS X6, X30, K2, X3                          // 62f20d0253de

	VRCP28SS X13, X11, K2, X3                          // 62d2250acbdd
	VRCP28SS X6, X11, K2, X3                           // 62f2250acbde
	VRCP28SS X12, X11, K2, X3                          // 62d2250acbdc
	VRCP28SS X13, X15, K2, X3                          // 62d2050acbdd
	VRCP28SS X6, X15, K2, X3                           // 62f2050acbde
	VRCP28SS X12, X15, K2, X3                          // 62d2050acbdc

	VAESDEC (SP), X0, X31                              // 62627d08de3c24 or 6262fd08de3c24
	VAESDEC X24, X7, X3                                // 62924508ded8 or 6292c508ded8
	VAESDEC X20, X7, X3                                // 62b24508dedc or 62b2c508dedc
	VAESDEC X24, X0, X3                                // 62927d08ded8 or 6292fd08ded8
	VAESDEC X20, X0, X3                                // 62b27d08dedc or 62b2fd08dedc

	VPLZCNTD X3, K3, X17                               // 62e27d0b44cb
	VPLZCNTD X26, K3, X17                              // 62827d0b44ca
	VPLZCNTD X23, K3, X17                              // 62a27d0b44cf
	VPLZCNTD 15(DX)(BX*1), K3, X17                     // 62e27d0b448c1a0f000000
	VPLZCNTD -7(CX)(DX*2), K3, X17                     // 62e27d0b448c51f9ffffff
	VPLZCNTD X3, K3, X15                               // 62727d0b44fb

	{"SI", "SI"},
	{"SP", "SP"},
	{"X0", "X0"},
	{"X1", "X1"},
	{"X10", "X10"},
	{"X11", "X11"},
	{"X12", "X12"},
	{"X13", "X13"},
	{"X14", "X14"},
	{"X15", "X15"},
	{"X2", "X2"},
	{"X3", "X3"},
	{"X4", "X4"},
	{"X5", "X5"},
	{"X6", "X6"},
	{"X7", "X7"},
	{"X8", "X8"},
	{"X9", "X9"},
	{"_expand_key_128<>(SB)", "_expand_key_128<>(SB)"},
	{"_seek<>(SB)", "_seek<>(SB)"},

    }
    return retVal;
  }

  private enum SmallEnum {
    X0,
    X1,
    X2
  }

  private enum MediumEnum {
    X0,
    X1,
    X2,
    X3,
    X4,
    X5,
    X6,
    X7,
    X8,
    X9,
    X10,
    X11,
    X12,
    X13,
    X14,
    X15,
    X16,
    X17,
    X18,
    X19,
    X20,
    X21,

			x1 := p.getConstant(prog, op, &a[1])
			x2 := int64(p.getRegister(prog, op, &a[2]))
			x3 := int64(p.getRegister(prog, op, &a[3]))
			x4 := int64(p.getRegister(prog, op, &a[4]))
			x5 := p.getConstant(prog, op, &a[5])
			// Cond is handled specially for this instruction.
			offset, MRC, ok := arch.ARMMRCOffset(op, cond, x0, x1, x2, x3, x4, x5)
			if !ok {
				p.errorf("unrecognized condition code .%q", cond)
			}

 *   {@code 1.0.RC2 < 1.0-RC3 < 1.0.1}; but prefer {@code 1.0.0-RC2} over {@code 1.0.0.RC2}, and more
 *   generally: {@code 1.0.X2 < 1.0-X3 < 1.0.1} for any string {@code X}; but prefer {@code 1.0.0-X1}
 *   over {@code 1.0.0.X1}.</li>
 * </ul>
 *
 * @see <a href="https://maven.apache.org/pom.html#version-order-specification">"Versioning" in the POM reference</a>