VPDI $0x4, V13, V13, V13 // flip the doublewords to big-endian order
	VPDI $0x4, V14, V14, V14 // flip the doublewords to big-endian order

	VACCCQ V5, V13, V28, V29
	VACQ   V5, V13, V28, V21
	VACCCQ V6, V14, V29, V30
	VACQ   V6, V14, V29, V22

	VPDI $0x4, V7, V7, V7    // flip the doublewords to big-endian order
	VPDI $0x4, V8, V8, V8    // flip the doublewords to big-endian order

	//TODO VFCMGT V26.D2, V15.D2, V23.D2       // f7e5fa6e
	//TODO FCMGT $0, F14, F3                   // c3c9e05e
	//TODO VFCMGT $0, V6.S2, V28.S2            // dcc8a00e
	//TODO FCMLE $0, F26, F25                  // 59dba07e
	//TODO VFCMLE $0, V28.S2, V20.S2           // 94dba02e
	//TODO FCMLT $0, F17, F3                   // 23eae05e
	//TODO VFCMLT $0, V8.S4, V7.S4             // 07e9a04e

	{"V17", "V17"},
	{"V18", "V18"},
	{"V19", "V19"},
	{"V20", "V20"},
	{"V21", "V21"},
	{"V22", "V22"},
	{"V23", "V23"},
	{"V24", "V24"},
	{"V25", "V25"},
	{"V26", "V26"},
	{"V27", "V27"},
	{"V28", "V28"},
	{"V29", "V29"},
	{"V30", "V30"},
	{"V31", "V31"},
	{"F14", "F14"},
	{"F15", "F15"},
	{"F16", "F16"},
	{"F17", "F17"},
	{"F18", "F18"},
	{"F19", "F19"},
	{"F20", "F20"},

// counterCryptASM.

// Load the initial GCM counter value
// in V30 and set up the counter increment
// in V31
#define SETUP_COUNTER \
	P8_LXVB16X(COUNTER, R0, V30); \
	VSPLTISB $1, V28; \
	VXOR V31, V31, V31; \
	VSLDOI $1, V31, V28, V31

// These macros set up the initial value
// for a single encryption, or 4 or 8
// stitched encryptions implemented
// with interleaving vciphers.
//

#define R_x0f0	R25
#define R_x100	R26
#define R_x110	R27


// V0-V7 are A-H
// V8-V23 are used for the message schedule
#define KI	V24
#define FUNC	V25
#define S0	V26
#define S1	V27
#define s0	V28
#define s1	V29
#define LEMASK	V31 // Permutation control register for little endian

// 4 copies of each Kt, to fill all 4 words of a vector register
DATA  ·kcon+0x000(SB)/8, $0x428a2f98428a2f98

#define R_x0f0	R28
#define R_x100	R29
#define R_x110	R27


// V0-V7 are A-H
// V8-V23 are used for the message schedule
#define KI	V24
#define FUNC	V25
#define S0	V26
#define S1	V27
#define s0	V28
#define s1	V29
#define LEMASK	V31	// Permutation control register for little endian

// VPERM is needed on LE to switch the bytes

#ifdef GOARCH_ppc64le
#define VPERMLE(va,vb,vc,vt) VPERM va, vb, vc, vt
#else

#define off48	R18
#define off64	R19
#define off80	R20
#define off96	R21
#define	off112	R22

#define const1	V24
#define const2	V25

#define byteswap	V26
#define mask_32bit	V27
#define mask_64bit	V28
#define zeroes		V29

#define MAX_SIZE	32*1024
#define REFLECT

TEXT ·ppc64SlicingUpdateBy8(SB), NOSPLIT|NOFRAME, $0-44
	MOVWZ	crc+0(FP), R3   // incoming crc
	MOVD    table8+8(FP), R4   // *Table

#define R_x0f0	R25
#define R_x100	R26
#define R_x110	R27


// V0-V7 are A-H
// V8-V23 are used for the message schedule
#define KI	V24
#define FUNC	V25
#define S0	V26
#define S1	V27
#define s0	V28
#define s1	V29
#define LEMASK	V31 // Permutation control register for little endian

// 4 copies of each Kt, to fill all 4 words of a vector register
DATA  ·kcon+0x000(SB)/8, $0x428a2f98428a2f98

	V3
	V4
	V5
	V6
	V7
	V8
	V9
	V10
	V11
	V12
	V13
	V14
	V15
	V16
	V17
	V18
	V19
	V20
	V21
	V22
	V23
	V24
	V25
	V26
	V27
	V28
	V29
	V30
	V31

	WSP = WZR // These are different registers with the same encoding.
	SP  = XZR // These are different registers with the same encoding.
)

func (Reg) isArg() {}

#define H_1 V20
#define H_2 V21
#define H_3 V22
#define H_4 V23

// temporary registers (for short-lived values)
#define T_0 V24
#define T_1 V25
#define T_2 V26
#define T_3 V27
#define T_4 V28

GLOBL ·constants<>(SB), RODATA, $0x30
// EX0
DATA ·constants<>+0x00(SB)/8, $0x0006050403020100
DATA ·constants<>+0x08(SB)/8, $0x1016151413121110
// EX1
DATA ·constants<>+0x10(SB)/8, $0x060c0b0a09080706