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Results 1 - 10 of 152 for V2 (0.01 seconds)

  1. fastapi/_compat/v2.py

    RequiredParam = PydanticUndefined
    Undefined = PydanticUndefined
    UndefinedType = PydanticUndefinedType
    evaluate_forwardref = eval_type_lenient
    Validator = Any
    
    # TODO: remove when dropping support for Pydantic < v2.12.3
    _Attrs = {
        "default": ...,
        "default_factory": None,
        "alias": None,
        "alias_priority": None,
        "validation_alias": None,
        "serialization_alias": None,
        "title": None,
    Created: Sun Dec 28 07:19:09 GMT 2025
    - Last Modified: Sat Dec 27 12:54:56 GMT 2025
    - 19.1K bytes
    - Click Count (0)
  2. cmd/signature-v2.go

    }
    
    // Return signature-v2 for the presigned request.
    func preSignatureV2(cred auth.Credentials, method string, encodedResource string, encodedQuery string, headers http.Header, expires string) string {
    	stringToSign := getStringToSignV2(method, encodedResource, encodedQuery, headers, expires)
    	return calculateSignatureV2(stringToSign, cred.SecretKey)
    }
    
    // Return the signature v2 of a given request.
    Created: Sun Dec 28 19:28:13 GMT 2025
    - Last Modified: Fri Aug 29 02:39:48 GMT 2025
    - 12.2K bytes
    - Click Count (0)
  3. src/cmd/asm/internal/asm/testdata/ppc64_p10.s

    	VDIVESD V1, V2, V3                      // 106113cb
    	VDIVESQ V1, V2, V3                      // 1061130b
    	VDIVESW V1, V2, V3                      // 1061138b
    	VDIVEUD V1, V2, V3                      // 106112cb
    	VDIVEUQ V1, V2, V3                      // 1061120b
    	VDIVEUW V1, V2, V3                      // 1061128b
    	VDIVSD V1, V2, V3                       // 106111cb
    Created: Tue Dec 30 11:13:12 GMT 2025
    - Last Modified: Thu Mar 23 20:52:57 GMT 2023
    - 14.3K bytes
    - Click Count (0)
  4. src/cmd/asm/internal/asm/testdata/riscv64validation.s

    	VWSUBUVV	X10, V2, V3			// ERROR "expected vector register in vs1 position"
    	VWSUBUVX	V1, V2, V3			// ERROR "expected integer register in rs1 position"
    	VWADDVV		X10, V2, V3			// ERROR "expected vector register in vs1 position"
    	VWADDVX		V1, V2, V3			// ERROR "expected integer register in rs1 position"
    	VWSUBVV		X10, V2, V3			// ERROR "expected vector register in vs1 position"
    Created: Tue Dec 30 11:13:12 GMT 2025
    - Last Modified: Thu Nov 13 12:17:37 GMT 2025
    - 42.1K bytes
    - Click Count (0)
  5. build-logic/binary-compatibility/src/test/kotlin/gradlebuild/binarycompatibility/AbstractBinaryCompatibilityTest.kt

                        }
                        project(":v2") {
                            version = "2.0"
                        }
                    """
                )
                withDirectory("v1/src/main").v1()
                withDirectory("v2/src/main").v2()
                val sourceRoots = if (File(withDirectory("v2/src/main"), "java").exists()) {
                    "v2/src/main/java"
                } else {
    Created: Wed Dec 31 11:36:14 GMT 2025
    - Last Modified: Tue Dec 30 10:14:25 GMT 2025
    - 18K bytes
    - Click Count (0)
  6. src/cmd/asm/internal/asm/testdata/arm64error.s

    	VPMULL2	V1.H4, V2.H4, V3.Q1                              // ERROR "operand mismatch"
    	VPMULL2	V1.D1, V2.D1, V3.Q1                              // ERROR "operand mismatch"
    	VPMULL2	V1.B8, V2.B8, V3.H8                              // ERROR "operand mismatch"
    	VEXT	$8, V1.B16, V2.B8, V2.B16                        // ERROR "invalid arrangement"
    	VEXT	$8, V1.H8, V2.H8, V2.H8                          // ERROR "invalid arrangement"
    Created: Tue Dec 30 11:13:12 GMT 2025
    - Last Modified: Tue Oct 14 19:00:00 GMT 2025
    - 38.4K bytes
    - Click Count (0)
  7. src/cmd/asm/internal/asm/testdata/riscv64error.s

    	VNEGV		V2, V3, V4			// ERROR "invalid vector mask register"
    	VWADDUVV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
    	VWADDUVX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
    	VWSUBUVV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
    	VWSUBUVX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
    	VWADDVV		V1, V2, V4, V3			// ERROR "invalid vector mask register"
    Created: Tue Dec 30 11:13:12 GMT 2025
    - Last Modified: Wed Sep 24 13:21:53 GMT 2025
    - 26.8K bytes
    - Click Count (0)
  8. src/cmd/asm/internal/asm/testdata/loong64enc1.s

    	VXORV		V1, V2, V3      // 43042771
    	VNORV		V1, V2, V3      // 43842771
    	VANDNV		V1, V2, V3      // 43042871
    	VORNV		V1, V2, V3      // 43842871
    	VANDV		V1, V2		// 42042671
    	VORV		V1, V2		// 42842671
    	VXORV		V1, V2		// 42042771
    	VNORV		V1, V2		// 42842771
    	VANDNV		V1, V2		// 42042871
    	VORNV		V1, V2		// 42842871
    
    	// VANDB,VORB,VXORB,VNORB
    	VANDB		$0, V2, V3      // 4300d073
    	VORB		$64, V2, V3     // 4300d573
    Created: Tue Dec 30 11:13:12 GMT 2025
    - Last Modified: Thu Nov 27 00:46:52 GMT 2025
    - 44.5K bytes
    - Click Count (0)
  9. go.mod

    	go.uber.org/atomic v1.11.0
    	go.uber.org/zap v1.27.0
    	goftp.io/server/v2 v2.0.1
    	golang.org/x/crypto v0.37.0
    	golang.org/x/oauth2 v0.29.0
    	golang.org/x/sync v0.13.0
    	golang.org/x/sys v0.32.0
    	golang.org/x/term v0.31.0
    	golang.org/x/time v0.11.0
    	google.golang.org/api v0.230.0
    	gopkg.in/yaml.v2 v2.4.0
    	gopkg.in/yaml.v3 v3.0.1
    )
    
    require (
    	aead.dev/mem v0.2.0 // indirect
    Created: Sun Dec 28 19:28:13 GMT 2025
    - Last Modified: Fri Oct 10 18:57:03 GMT 2025
    - 12.2K bytes
    - Click Count (0)
  10. compat/maven-artifact/src/test/java/org/apache/maven/artifact/versioning/ComparableVersionTest.java

            assertEquals(c2, c1, "expected " + v2 + ".equals( " + v1 + " )");
        }
    
        private void checkVersionsHaveSameOrder(String v1, String v2) {
            ComparableVersion c1 = new ComparableVersion(v1);
            ComparableVersion c2 = new ComparableVersion(v2);
            assertEquals(0, c1.compareTo(c2), "expected " + v1 + " == " + v2);
            assertEquals(0, c2.compareTo(c1), "expected " + v2 + " == " + v1);
        }
    
    Created: Sun Dec 28 03:35:09 GMT 2025
    - Last Modified: Fri Mar 21 04:56:21 GMT 2025
    - 17.8K bytes
    - Click Count (0)
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