REGSP   = REG_R1
	REGSB   = REG_R2
	REGRET  = REG_R3
	REGARG  = -1      /* -1 disables passing the first argument in register */
	REGRT1  = REG_R20 /* reserved for runtime, duffzero and duffcopy */
	REGRT2  = REG_R21 /* reserved for runtime, duffcopy */
	REGMIN  = REG_R7  /* register variables allocated from here to REGMAX */
	REGCTXT = REG_R11 /* context for closures */
	REGTLS  = REG_R13 /* C ABI TLS base pointer */
	REGMAX  = REG_R27

				p.From.Reg = REGSP
			}

		case obj.ADUFFCOPY:
			//  ADR	ret_addr, R27
			//  STP	(FP, R27), -24(SP)
			//  SUB	24, SP, FP
			//  DUFFCOPY
			// ret_addr:
			//  SUB	8, SP, FP

			q1 := p
			// copy DUFFCOPY from q1 to q4
			q4 := obj.Appendp(p, c.newprog)
			q4.Pos = p.Pos
			q4.As = obj.ADUFFCOPY
			q4.To = p.To

			q1.As = AADR
			q1.From.Type = obj.TYPE_BRANCH

			},
			typ:            "Mem",
			faultOnNilArg0: true,
		},

		// duffcopy
		// arg0 = address of dst memory (in R21, changed as side effect)
		// arg1 = address of src memory (in R20, changed as side effect)
		// arg2 = mem
		// auxint = offset into duffcopy code to start executing
		// returns mem
		{
			name:      "DUFFCOPY",
			aux:       "Int64",
			argLength: 3,
			reg: regInfo{

				clobbers: buildReg("R1 R31"),
			},
			faultOnNilArg0: true,
		},

		// duffcopy
		// arg0 = address of dst memory (in R2, changed as side effect)
		// arg1 = address of src memory (in R1, changed as side effect)
		// arg2 = mem
		// auxint = offset into duffcopy code to start executing
		// returns mem
		{
			name:      "DUFFCOPY",
			aux:       "Int64",
			argLength: 3,
			reg: regInfo{

			faultOnNilArg0: true,
		},

		// duffcopy
		// arg0 = address of dst memory (in X25, changed as side effect)
		// arg1 = address of src memory (in X24, changed as side effect)
		// arg2 = mem
		// auxint = offset into duffcopy code to start executing
		// X1 (link register) changed because of function call
		// returns mem
		{
			name:      "DUFFCOPY",
			aux:       "Int64",
			argLength: 3,

// These are special functions which should not have a TOC regeneration
// prologue.
func isNOTOCfunc(name string) bool {
	switch {
	case name == "runtime.duffzero":
		return true
	case name == "runtime.duffcopy":
		return true
	case strings.HasPrefix(name, "runtime.elf_"):
		return true
	default:
		return false
	}
}

// Try converting FMOVD/FMOVS to XXSPLTIDP. If it is converted,
// return true.

						continue
					}
				case auxInt32:
					// Mips uses this auxType for atomic add constant. It does not affect the effective address.
				case auxInt64:
					// ARM uses this auxType for duffcopy/duffzero/alignment info.
					// It does not affect the effective address.
				case auxNone:
					// offset is zero.
				default:

			},
			faultOnNilArg0: true,
		},

		// duffcopy (must be 4-byte aligned)
		// arg0 = address of dst memory (in R2, changed as side effect)
		// arg1 = address of src memory (in R1, changed as side effect)
		// arg2 = mem
		// auxint = offset into duffcopy code to start executing
		// returns mem
		{
			name:      "DUFFCOPY",
			aux:       "Int64",
			argLength: 3,
			reg: regInfo{

				stores = append(stores, v)
				for _, a := range v.Args {
					if a.Block == b && a.Type.IsMemory() {
						storeUse.add(a.ID)
						if v.Op != OpStore && v.Op != OpZero && v.Op != OpVarDef {
							// CALL, DUFFCOPY, etc. are both
							// reads and writes.
							loadUse.add(a.ID)
						}
					}
				}
			} else {
				if v.Op == OpLocalAddr {
					if _, ok := localAddrs[v.Aux]; !ok {
						localAddrs[v.Aux] = v

		as := &aSpace[i]
		if as.lo <= a && int(a-as.lo) < len(as.names) {
			return as.names[a-as.lo]
		}
	}
	return fmt.Sprintf("A???%d", a)
}

var Anames = []string{
	"XXX",
	"CALL",
	"DUFFCOPY",
	"DUFFZERO",
	"END",
	"FUNCDATA",
	"JMP",
	"NOP",
	"PCALIGN",
	"PCALIGNMAX",
	"PCDATA",
	"RET",
	"GETCALLERPC",
	"TEXT",
	"UNDEF",
}

func Bool2int(b bool) int {