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Results 1 - 5 of 5 for DIV (0.01 sec)

  1. src/cmd/asm/internal/asm/testdata/loong64enc1.s

    	MULHU	R4, R5			// a5101d00
    	MULHU	R4, R5, R6		// a6101d00
    	REM	R4, R5	  		// a5902000
    	REM	R4, R5, R6	  	// a6902000
    	REMU	R4, R5	   		// a5902100
    	REMU	R4, R5, R6	   	// a6902100
    	DIV	R4, R5	  		// a5102000
    	DIV	R4, R5, R6	  	// a6102000
    	DIVU	R4, R5	   		// a5102100
    	DIVU	R4, R5, R6	   	// a6102100
    	SRLV	R4, R5 			// a5101900
    	SRLV	R4, R5, R6 		// a6101900
    	SRLV	$4, R4, R5		// 85104500
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Thu Sep 04 19:24:25 UTC 2025
    - 35.5K bytes
    - Viewed (0)
  2. api/go1.12.txt

    pkg math/bits, func Add(uint, uint, uint) (uint, uint)
    pkg math/bits, func Add32(uint32, uint32, uint32) (uint32, uint32)
    pkg math/bits, func Add64(uint64, uint64, uint64) (uint64, uint64)
    pkg math/bits, func Div(uint, uint, uint) (uint, uint)
    pkg math/bits, func Div32(uint32, uint32, uint32) (uint32, uint32)
    pkg math/bits, func Div64(uint64, uint64, uint64) (uint64, uint64)
    pkg math/bits, func Mul(uint, uint) (uint, uint)
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Wed Jan 02 21:21:53 UTC 2019
    - 13.5K bytes
    - Viewed (0)
  3. src/cmd/asm/internal/asm/testdata/mips64.s

    //	}
    	MUL	R19, R8		// 01130018
    	MULU	R21, R13	// 01b50019
    	MULV	R19, R8		// 0113001c
    	MULVU	R21, R13	// 01b5001d
    
    //	LDIV rreg ',' rreg
    //	{
    //		outcode(int($1), &$2, 0, &$4);
    //	}
    	DIV	R18, R22	// 02d2001a
    	DIVU	R14, R9		// 012e001b
    	DIVV	R8, R13		// 01a8001e
    	DIVVU	R16, R19	// 0270001f
    
    //	LREM rreg ',' rreg
    //	{
    //		outcode(int($1), &$2, 0, &$4);
    //	}
    	REM	R18, R22	// 02d2001a
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Tue Aug 08 12:17:12 UTC 2023
    - 12.4K bytes
    - Viewed (0)
  4. README.md

    <div align="center">
      <img src="https://www.tensorflow.org/images/tf_logo_horizontal.png">
    </div>
    
    [![Python](https://img.shields.io/pypi/pyversions/tensorflow.svg)](https://badge.fury.io/py/tensorflow)
    [![PyPI](https://badge.fury.io/py/tensorflow.svg)](https://badge.fury.io/py/tensorflow)
    [![DOI](https://zenodo.org/badge/DOI/10.5281/zenodo.4724125.svg)](https://doi.org/10.5281/zenodo.4724125)
    Registered: Tue Sep 09 12:39:10 UTC 2025
    - Last Modified: Fri Jul 18 14:09:03 UTC 2025
    - 11.6K bytes
    - Viewed (0)
  5. doc/asm.html

    the name <code>R10</code> is not recognized.
    </p>
    
    <p>
    To make it easier for people and compilers to write assembly, the ARM linker
    allows general addressing forms and pseudo-operations like <code>DIV</code> or <code>MOD</code>
    that may not be expressible using a single hardware instruction.
    It implements these forms as multiple instructions, often using the <code>R11</code> register
    to hold temporary values.
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Tue Nov 28 19:15:27 UTC 2023
    - 36.3K bytes
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