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Results 1 - 10 of 60 for AUX (0.02 sec)

  1. src/cmd/compile/internal/ssa/_gen/386Ops.go

    		{name: "LEAL", argLength: 1, reg: gp11sb, aux: "SymOff", rematerializeable: true, symEffect: "Addr"}, // arg0 + auxint + offset encoded in aux
    		{name: "LEAL1", argLength: 2, reg: gp21sb, commutative: true, aux: "SymOff", symEffect: "Addr"},      // arg0 + arg1 + auxint + aux
    		{name: "LEAL2", argLength: 2, reg: gp21sb, aux: "SymOff", symEffect: "Addr"},                         // arg0 + 2*arg1 + auxint + aux
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Mar 14 08:10:32 UTC 2023
    - 45.1K bytes
    - Viewed (0)
  2. src/cmd/compile/internal/ssa/_gen/PPC64Ops.go

    		{name: "EXTSWSLconst", argLength: 1, reg: gp11, asm: "EXTSWSLI", aux: "Int64"},
    
    		{name: "RLWINM", argLength: 1, reg: gp11, asm: "RLWNM", aux: "Int64"},                           // Rotate and mask by immediate "rlwinm". encodePPC64RotateMask describes aux
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 19:59:38 UTC 2024
    - 43.8K bytes
    - Viewed (0)
  3. src/cmd/compile/internal/ssa/func.go

    	if v.InCache {
    		aux := v.AuxInt
    		if f.unCacheLine(v, aux) {
    			return
    		}
    		if aux == 0 {
    			switch v.Op {
    			case OpConstNil:
    				aux = constNilMagic
    			case OpConstSlice:
    				aux = constSliceMagic
    			case OpConstString:
    				aux = constEmptyStringMagic
    			case OpConstInterface:
    				aux = constInterfaceMagic
    			}
    			if aux != 0 && f.unCacheLine(v, aux) {
    				return
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Jun 10 19:44:43 UTC 2024
    - 25.8K bytes
    - Viewed (0)
  4. src/cmd/compile/internal/ssa/_gen/ARMOps.go

    		{name: "MOVHload", argLength: 2, reg: gpload, aux: "SymOff", asm: "MOVH", typ: "Int16", faultOnNilArg0: true, symEffect: "Read"},    // load from arg0 + auxInt + aux.  arg1=mem.
    		{name: "MOVHUload", argLength: 2, reg: gpload, aux: "SymOff", asm: "MOVHU", typ: "UInt16", faultOnNilArg0: true, symEffect: "Read"}, // load from arg0 + auxInt + aux.  arg1=mem.
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Feb 24 00:21:13 UTC 2023
    - 41K bytes
    - Viewed (0)
  5. src/cmd/compile/internal/ssa/_gen/WasmOps.go

    		{name: "I64Load32U", asm: "I64Load32U", argLength: 2, reg: gpload, aux: "Int64", typ: "UInt32"}, // read unsigned 32-bit integer from address arg0+aux, arg1=mem
    		{name: "I64Load32S", asm: "I64Load32S", argLength: 2, reg: gpload, aux: "Int64", typ: "Int32"},  // read signed 32-bit integer from address arg0+aux, arg1=mem
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Feb 24 00:21:13 UTC 2023
    - 17.7K bytes
    - Viewed (0)
  6. src/cmd/compile/internal/ssa/_gen/MIPSOps.go

    		{name: "MOVHload", argLength: 2, reg: gpload, aux: "SymOff", asm: "MOVH", typ: "Int16", faultOnNilArg0: true, symEffect: "Read"},    // load from arg0 + auxInt + aux.  arg1=mem.
    		{name: "MOVHUload", argLength: 2, reg: gpload, aux: "SymOff", asm: "MOVHU", typ: "UInt16", faultOnNilArg0: true, symEffect: "Read"}, // load from arg0 + auxInt + aux.  arg1=mem.
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 24 14:43:03 UTC 2023
    - 24K bytes
    - Viewed (0)
  7. src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go

    		{name: "MOVHload", argLength: 2, reg: gpload, aux: "SymOff", asm: "MOVH", typ: "Int16", faultOnNilArg0: true, symEffect: "Read"},    // load from arg0 + auxInt + aux.  arg1=mem.
    		{name: "MOVHUload", argLength: 2, reg: gpload, aux: "SymOff", asm: "MOVHU", typ: "UInt16", faultOnNilArg0: true, symEffect: "Read"}, // load from arg0 + auxInt + aux.  arg1=mem.
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Nov 21 19:04:19 UTC 2023
    - 25.2K bytes
    - Viewed (0)
  8. src/cmd/compile/internal/ssa/rewriteAMD64splitload.go

    	// result: (TESTB x:(MOVBload {sym} [vo.Off()] ptr mem) x)
    	for {
    		vo := auxIntToValAndOff(v.AuxInt)
    		sym := auxToSym(v.Aux)
    		ptr := v_0
    		mem := v_1
    		if !(vo.Val() == 0) {
    			break
    		}
    		v.reset(OpAMD64TESTB)
    		x := b.NewValue0(v.Pos, OpAMD64MOVBload, typ.UInt8)
    		x.AuxInt = int32ToAuxInt(vo.Off())
    		x.Aux = symToAux(sym)
    		x.AddArg2(ptr, mem)
    		v.AddArg2(x, x)
    		return true
    	}
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Jan 19 22:42:34 UTC 2023
    - 21.4K bytes
    - Viewed (0)
  9. src/cmd/compile/internal/ssa/_gen/MIPS64Ops.go

    		{name: "MOVHload", argLength: 2, reg: gpload, aux: "SymOff", asm: "MOVH", typ: "Int16", faultOnNilArg0: true, symEffect: "Read"},    // load from arg0 + auxInt + aux.  arg1=mem.
    		{name: "MOVHUload", argLength: 2, reg: gpload, aux: "SymOff", asm: "MOVHU", typ: "UInt16", faultOnNilArg0: true, symEffect: "Read"}, // load from arg0 + auxInt + aux.  arg1=mem.
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 24 03:36:31 UTC 2023
    - 25.5K bytes
    - Viewed (0)
  10. src/cmd/compile/internal/ssa/_gen/genericOps.go

    	{name: "Rsh16Ux16", argLength: 2, aux: "Bool"},
    	{name: "Rsh16Ux32", argLength: 2, aux: "Bool"},
    	{name: "Rsh16Ux64", argLength: 2, aux: "Bool"},
    	{name: "Rsh32Ux8", argLength: 2, aux: "Bool"},
    	{name: "Rsh32Ux16", argLength: 2, aux: "Bool"},
    	{name: "Rsh32Ux32", argLength: 2, aux: "Bool"},
    	{name: "Rsh32Ux64", argLength: 2, aux: "Bool"},
    	{name: "Rsh64Ux8", argLength: 2, aux: "Bool"},
    	{name: "Rsh64Ux16", argLength: 2, aux: "Bool"},
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 42.6K bytes
    - Viewed (0)
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