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Results 1 - 2 of 2 for AMULHSU (0.07 sec)

  2. github.com/golang/go

    src/cmd/internal/obj/riscv/cpu.go 

    	ASRLIW
	ASRAIW
	AADDW
	ASLLW
	ASRLW
	ASUBW
	ASRAW

	// 5.3: Load and Store Instructions (RV64I)
	ALD
	ASD

	// 7.1: Multiplication Operations
	AMUL
	AMULH
	AMULHU
	AMULHSU
	AMULW
	ADIV
	ADIVU
	AREM
	AREMU
	ADIVW
	ADIVUW
	AREMW
	AREMUW

	// 8.2: Load-Reserved/Store-Conditional Instructions
	ALRD
	ASCD
	ALRW
	ASCW
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Mar 20 14:19:33 UTC 2024
    - 13.1K bytes
    - Viewed (0)
  3. github.com/golang/go

    src/cmd/internal/obj/riscv/inst.go 

    		return &inst{0x33, 0x5, 0x0, 160, 0x5}
	case AMRET:
		return &inst{0x73, 0x0, 0x2, 770, 0x18}
	case AMUL:
		return &inst{0x33, 0x0, 0x0, 32, 0x1}
	case AMULH:
		return &inst{0x33, 0x1, 0x0, 32, 0x1}
	case AMULHSU:
		return &inst{0x33, 0x2, 0x0, 32, 0x1}
	case AMULHU:
		return &inst{0x33, 0x3, 0x0, 32, 0x1}
	case AMULW:
		return &inst{0x3b, 0x0, 0x0, 32, 0x1}
	case AOR:
		return &inst{0x33, 0x6, 0x0, 0, 0x0}
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Mar 20 14:19:33 UTC 2024
    - 13.9K bytes
    - Viewed (0)
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