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Results 1 - 4 of 4 for ADDW (0.12 sec)

  1. src/cmd/asm/internal/asm/testdata/s390x.s

    	ADDC	$1, R1, R2            // ec21000100db
    	ADDC	$-1, R1, R2           // ec21ffff00db
    	ADDC	R1, R2, R3            // b9ea1032
    	ADDW	R1, R2                // 1a21
    	ADDW	R1, R2, R3            // b9f81032
    	ADDW	$8192, R1             // a71a2000
    	ADDW	$8192, R1, R2         // ec21200000d8
    	ADDE	R1, R2                // b9880021
    	SUB	R3, R4                // b9090043
    	SUB	R3, R4, R5            // b9e93054
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Wed Sep 18 15:49:24 UTC 2024
    - 22.1K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/testdata/riscv64.s

    	SRLIW	$1, X5, X6				// 1bd31200
    	SRAIW	$1, X5, X6				// 1bd31240
    	ADDW	X5, X6, X7				// bb035300
    	SLLW	X5, X6, X7				// bb135300
    	SRLW	X5, X6, X7				// bb535300
    	SUBW	X5, X6, X7				// bb035340
    	SRAW	X5, X6, X7				// bb535340
    	ADDIW	$1, X6					// 1b031300
    	SLLIW	$1, X6					// 1b131300
    	SRLIW	$1, X6					// 1b531300
    	SRAIW	$1, X6					// 1b531340
    	ADDW	X5, X7					// bb835300
    	SLLW	X5, X7					// bb935300
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Fri Oct 25 12:05:29 UTC 2024
    - 16.8K bytes
    - Viewed (0)
  3. src/cmd/asm/internal/asm/testdata/arm64enc.s

    	ADCSW R9, R21, R6                          // a602093a
    	ADCS R23, R22, R22                         // d60217ba
    	ADDW R5.UXTH, R8, R9                       // 0921250b
    	ADD R8.SXTB<<3, R23, R14                   // ee8e288b
    	ADDW $3076, R17, R3                        // 23123011
    	ADDW $(3076<<12), R17, R3                  // ADDW $12599296, R17, R3           // 23127011
    	ADD $2280, R25, R11                        // 2ba32391
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Mon Jul 24 01:11:41 UTC 2023
    - 43.9K bytes
    - Viewed (0)
  4. src/cmd/asm/internal/asm/testdata/arm64error.s

    	NEGSW	R7<<33, R5                                       // ERROR "shift amount out of range 0 to 31"
    	ADD	R7@>2, R5, R16                                   // ERROR "unsupported shift operator"
    	ADDW	R7@>2, R5, R16                                   // ERROR "unsupported shift operator"
    	ADDS	R7@>2, R5, R16                                   // ERROR "unsupported shift operator"
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Fri Dec 08 03:28:17 UTC 2023
    - 37.8K bytes
    - Viewed (0)
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