ShapedType new_type = shaped_quantized_type.clone(storage_type);

  rewriter.setInsertionPointAfter(op);
  auto const_op =
      rewriter.create<TF::ConstOp>(op.getLoc(), new_type, tensor_proto_attr);
  auto new_identity_op = rewriter.create<TF::IdentityOp>(
      op->getLoc(), const_op.getType(), const_op);
  return new_identity_op.getResult();
}

Operation* LogicsForUniformDequanization(PatternRewriter& rewriter,

Value CreateZeroInput(Location loc, OpBuilder& builder, Attribute zero_attr,
                      DenseIntElementsAttr shape_attr) {
  ConstOp zero = builder.create<ConstOp>(loc, zero_attr);
  zero->setAttr(kICIWeightDistributionMlirBridgeMarker,
                builder.getBoolAttr(true));
  ConstOp shape = builder.create<ConstOp>(loc, shape_attr);
  shape->setAttr(kICIWeightDistributionMlirBridgeMarker,
                 builder.getBoolAttr(true));

// Helper method that returns an op from 'transpose_ops' that match criteria
// for an 'operand' and 'permutation'
TransposeOp ReuseExistingTranspose(const OpOperand* operand,
                                   const SmallVector<int64_t, 4>& permutation,
                                   Operation* op, ConstOp permutation_op,
                                   SmallVector<TransposeOp, 2>* transpose_ops) {

      // Consider UQ op legal if it has a CastOp next to the qint input/output.
      if (IsTFUniformQuantizedOp(op)) {
        return IsTFUniformQuantizedOpLegal(op);
      } else if (auto cast_op = llvm::dyn_cast<TF::CastOp>(op)) {
        return IsCastOpLegal(cast_op);
      } else if (auto const_op = llvm::dyn_cast<TF::ConstOp>(op)) {
        return !IsIllegalType(const_op.getOutput().getType());
      }

      float ratio_threshold = kBlockOverRandomSparsityRatio;
      if (isa<ConstOp>(inst)) {
        supported_block_size = sparse_op.GetFloatBlockSize();
        type = mlir::cast<ShapedType>(dyn_cast<ConstOp>(inst).getType());
      } else if (isa<QConstOp>(inst)) {
        supported_block_size = sparse_op.GetQuantizedBlockSize();
        type = mlir::cast<ShapedType>(dyn_cast<QConstOp>(inst).getType());

    }
  }

  const DimensionVector& batch_dimensions() const { return batch_dimensions_; }
  const DimensionVector& contracting_dimensions() const {
    return contracting_dimensions_;
  }
  // Out dimensions are any dimensions that are neither batch nor contracting
  // dimensions, hence will be propagated to output shape.
  const DimensionVector& out_dimensions() const { return out_dimensions_; }

  if (!type) return -1;
  auto indices_op = indices.getDefiningOp();
  if (!indices_op) return -1;
  auto const_op = llvm::dyn_cast<TF::ConstOp>(indices_op);
  if (!const_op) return -1;
  int64_t last_index = -1;
  int64_t first_index = -1;
  for (const auto& ind : const_op.getValue().getValues<APInt>()) {
    if (last_index == -1) {
      last_index = ind.getSExtValue();
      first_index = last_index;

    TFL::Conv2DOp conv_op, PatternRewriter& rewriter) const {
  return EnsureBias(conv_op, 2, rewriter);
}

// ================== slice ============================

// If a slice op has < 4d dimension, will pad it to 4d.
LogicalResult PadSlice::matchAndRewrite(TFL::SliceOp slice_op,
                                        PatternRewriter& rewriter) const {

  }];

  let arguments = (ins
    StrAttr:$node_def,
    I32Attr:$op_key
  );

  let assemblyFormat = "attr-dict";
}

def ConstOp: TensorflowMlrt_Op<"constop", []> {
  let summary = "The tf_mlrt ConstOp";

  let description = [{
    The ConstOp creates a constant tensorflow::Tensor from serialized proto.
  }];

  let arguments = (ins
    StrAttr:$tensor_proto
  );

  let results = (outs

// PadOp and CastOp.
std::optional<BlockArgumentInfo> GetInputBlockArgNum(Value input) {
  auto block_arg_num = GetBlockArgNum(input);
  if (block_arg_num.has_value()) return block_arg_num;

  Value next_input = input;
  auto pad_op = dyn_cast_or_null<TF::PadOp>(next_input.getDefiningOp());
  auto cast_op = dyn_cast_or_null<TF::CastOp>(next_input.getDefiningOp());