if (failed(ConvertTFTextAPI(func, api_name, attr))) {
      return signalPassFailure();
    }
  } else if (api_name == kCustomSSDPostprocessing) {
    ConvertSSDPostProcessFunc convert_ssd_postprocess(func, attr);
    if (failed(convert_ssd_postprocess.VerifySignature())) return;
    if (failed(convert_ssd_postprocess.RewriteFunc())) {
      return signalPassFailure();
    }
  } else if (api_name == kCustomMaxUnpooling) {

      op->emitOpError() << "embedding ops in two different regions";
      return signalPassFailure();
    }
    if (GetReplicationAttr(op) != replication_attr) {
      op->emitOpError() << "embedding ops with different replication info "
                        << replication_attr << " vs " << GetReplicationAttr(op);
      return signalPassFailure();
    }
  }

  // TODO(bfontain): Check that the region here is the region

      return WalkResult::interrupt();

    to_be_erased.push_back(op);
    return WalkResult::advance();
  });
  if (result.wasInterrupted()) return signalPassFailure();

  if (failed(tensorflow::EraseClusterFuncs(to_be_erased)))
    return signalPassFailure();

  // Eliminate TPUCompilationResultOp now that the rewrite is complete.
  for (auto& it : compilation_results) {
    for (auto op : it.second) {

    if (isa<tf_device::LaunchOp>(op->getParentOp())) {
      if (failed(MovePreprocessingOpInLaunch(&builder, getOperation(), op)))
        return signalPassFailure();
    } else {
      if (failed(MoveStandalonePreprocessingOp(&builder, getOperation(), op)))
        return signalPassFailure();
    }
    RewritePreprocessInputs(&builder, getOperation(), op);
  }

  // Handle ops with mini_batch_in_csr attribute.

    // represented with TF IfOp and WhileOp operations. In this case, there
    // should be only one basic blocks in the MLIR representation.
    if (failed(CheckSingleBlockFunction(func))) return signalPassFailure();

    llvm::SmallVector<std::string, 4> var_handle_shared_names;
    if (failed(ResourceLiftingForFunctionalControlFlow(func)) ||
        failed(PromoteVarHandlesToArguments(func, /*add_validation=*/true,

        failed(ApplyVhloToVersionPatterns(module, target_version)) ||
        failed(ApplyTypeConverter(module, to_builtin_converter)) ||
        failed(ApplyUnrealizedCastCanonicalization(module)))
      return signalPassFailure();
  }
};

struct LegalizeVhloToStablehloPass
    : public impl::LegalizeVhloToStablehloPassBase<
          LegalizeVhloToStablehloPass> {
  void runOnOperation() override {

  if (llvm::hasSingleElement(graph_op_range))
    graph_op = dyn_cast<tf_executor::GraphOp>(func.front().front());

  if (!graph_op) {
    func.emitError("expected function to contain only a graph_op");
    signalPassFailure();
    return;
  }

  // New control inputs to be added. For an operation x, new_control_inputs[x]
  // contains all control inputs that need to be added to x as operands.

          "we cannot find corresponding implementation for this call op");
      signalPassFailure();
    }

    for (auto impl : impl_iter->second) {
      auto inference_device_type = GetInferenceDeviceTypeForOp(impl);
      if (!inference_device_type.has_value()) {
        impl.emitError("we cannot find inference device type for this func");
        signalPassFailure();
      }

      if (IfOp if_op = llvm::dyn_cast<IfOp>(op)) {
        if (failed(LowerIfOp(if_op))) {
          return signalPassFailure();
        }
        break;
      }
      if (WhileOp while_op = llvm::dyn_cast<WhileOp>(op)) {
        if (failed(LowerWhileOp(while_op))) {
          return signalPassFailure();
        }
        break;
      }
    }
  }
}

}  // namespace

  mlir::ModuleOp module = func->getParentOfType<mlir::ModuleOp>();
  if (!module) return signalPassFailure();
  func.walk([&](ClusterOp cluster) {
    if (auto replicate = cluster->getParentOfType<ReplicateOp>()) {
      if (failed(MoveAllBroadcastsToCluster(cluster, replicate, module))) {
        return signalPassFailure();
      }
    }
  });
}

}  // namespace