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Results 1 - 10 of 62 for add32a (0.09 sec)
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tensorflow/compiler/mlir/tensorflow/tests/tensor_list_ops_decomposition.mlir
// CHECK-NEXT: %[[ADDN2:.*]] = "tf.AddN"(%[[ADDN]], %[[ZEROS_LIKE]]) : (tensor<10xf32>, tensor<10xf32>) -> tensor<10xf32> %addn2 = "tf.AddN"(%addn, %zeros-like) : (tensor<!tf_type.variant<tensor<f32>>>, tensor<!tf_type.variant<tensor<f32>>>) -> tensor<!tf_type.variant<tensor<f32>>> %stack = "tf.TensorListStack"(%addn2, %elem_shape) : (tensor<!tf_type.variant<tensor<f32>>>, tensor<0xi32>) -> tensor<10xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 38.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/breakup-islands.mlir
// CHECK: %[[ADD3:.*]], %[[ADD3_control:.*]] = tf_executor.island(%[[ISLAND1]], %[[ADD2_control]]) wraps "tf.Add"(%[[ADD2]], %[[ADD2]]) // CHECK: %[[PRINT2:.*]], %[[PRINT2_control:.*]] = tf_executor.island wraps "tf.Print"(%[[ADD3]]) <{message = "add result"}> // CHECK: tf_executor.fetch %[[ADD2]], %[[MUL]], %[[PRINT1_control]], %[[PRINT2_control:.*]] : // CHECK: }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Oct 31 08:59:10 UTC 2023 - 28.5K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/promote_resources_to_args.mlir
// CHECK-NOT: "tf.ReadVariableOp" // CHECK: %[[CONST:.*]] = "tf.Const"() <{value = dense<4.200000e+01> : tensor<f32>}> // CHECK: %[[ADD1:[0-9]*]] = "tf.AddV2"(%arg1, %[[CONST]]) // CHECK: %[[ADD2:[0-9]*]] = "tf.AddV2"(%[[ADD1]], %arg1) // CHECK: %[[PACK:[0-9]*]] = "tf.Pack"(%[[CONST]], %[[ADD2]]) // CHECK: return %[[PACK]] %0 = "tf.Const"() {value = dense<4.200000e+01> : tensor<f32>} : () -> tensor<f32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 18.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/hoist_loop_invariant.mlir
// CHECK: tf.WhileRegion // CHECK: ^bb0 // CHECK: tf.OpA // CHECK: ^bb0([[ARG_2:%[a-zA-Z0-9_]+]] // CHECK-SAME: [[ARG_3:%[a-zA-Z0-9_]+]]: tensor<i32>) // CHECK-NEXT: [[RES_3:%.*]] = "tf.AddV2"([[ARG_2]], [[RES_1]]) // CHECK-NEXT: [[RES_4:%.*]] = "tf.Div"([[ARG_3]], [[RES_2]]) // CHECK: "tf.Yield"([[RES_3]], [[RES_4]])
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Aug 22 17:12:02 UTC 2023 - 14.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/tfrt/tests/mlrt/tf_to_mlrt.mlir
// CHECK-NEXT: tf_mlrt.executeop([[y]] %w = "tf.AddV2"(%y, %z) {__op_key = 2: i32}: (tensor<i32>, tensor<i32>) -> tensor<i32> // CHECK-NEXT: tf_mlrt.executeop([[y]] %u = "tf.AddV2"(%y, %z) {__op_key = 3: i32} : (tensor<i32>, tensor<i32>) -> tensor<i32> // CHECK-NEXT: tf_mlrt.executeop([[y]] %v = "tf.AddV2"(%y, %z) {__op_key = 4: i32}: (tensor<i32>, tensor<i32>) -> tensor<i32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri May 31 20:44:15 UTC 2024 - 24.7K bytes - Viewed (0) -
tensorflow/compiler/mlir/tfrt/tests/sink_in_invariant_ops.mlir
// CHECK: [[handle:%.*]] = "tf.VarHandleOp"() // CHECK: "tf.ReadVariableOp"([[handle]]) %0 = "tf.ReadVariableOp"(%arg1) {device = "/device:CPU:0"} : (tensor<*x!tf_type.resource>) -> tensor<1x3xf32> %1 = "tf.AddV2"(%arg0, %0) {device = "/device:CPU:0"} : (tensor<1x3xf32>, tensor<1x3xf32>) -> tensor<1x3xf32> %2 = "tf.Identity"(%1) {device = "/device:CPU:0"} : (tensor<1x3xf32>) -> tensor<1x3xf32> func.return %2 : tensor<1x3xf32> }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 21K bytes - Viewed (0) -
src/runtime/pprof/proto_test.go
map1, map2 = fake, fake } return } func TestConvertCPUProfile(t *testing.T) { addr1, addr2, map1, map2 := testPCs(t) b := []uint64{ 3, 0, 500, // hz = 500 5, 0, 10, uint64(addr1 + 1), uint64(addr1 + 2), // 10 samples in addr1 5, 0, 40, uint64(addr2 + 1), uint64(addr2 + 2), // 40 samples in addr2 5, 0, 10, uint64(addr1 + 1), uint64(addr1 + 2), // 10 samples in addr1 }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Jan 31 23:21:53 UTC 2024 - 17K bytes - Viewed (0) -
tensorflow/compiler/mlir/tfrt/tests/hoist_invariant_ops.mlir
// CHECK-NEXT: "tf.AddV2"({{.*}}, [[v]]) {device = "/CPU:0"} : (tensor<i32>, tensor<i32>) -> tensor<i32> // CHECK-NEXT: return %const = "tf.Const"() {device = "/CPU:0", value = dense<0> : tensor<i32>} : () -> tensor<i32> %x = "tf.AddV2"(%const, %const) {device = "/CPU:0"} : (tensor<i32>, tensor<i32>) -> tensor<i32> %r = "tf.AddV2"(%arg, %x) {device = "/CPU:0"} : (tensor<i32>, tensor<i32>) -> tensor<i32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Apr 01 23:54:14 UTC 2024 - 18.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/tests/prepare_lifting.mlir
// CHECK: %[[mul:.*]] = "tf.Mul"(%arg0, %[[CONST_0]]) : (tensor<*xf32>, tensor<2xf32>) -> tensor<*xf32> // CHECK: %[[add:.*]] = "tf.AddV2"(%[[mul]], %[[CONST]]) : (tensor<*xf32>, tensor<2xf32>) -> tensor<*xf32> // CHECK-NEXT: return %[[add]] : tensor<*xf32> // ----- func.func @not_decompose_batch_norm(%arg0: tensor<*xf32>) -> (tensor<*xf32>) {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Feb 14 03:24:59 UTC 2024 - 33.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/lower-static-tensor-list.mlir
// CHECK-LABEL: func @otherVariantWhileBody // CHECK: [[CST:%.*]] = "tf.Const"() // CHECK-NEXT: [[ADD:%.*]] = "tf.AddV2"(%arg2, [[CST]]) // CHECK-NEXT: [[TENSOR_MAP_INSERT_RESULT:%.*]] = "tf.TensorMapInsert"(%arg3, %arg2, %arg2) // CHECK-NEXT: [[ADD_2:%.*]] = "tf.AddV2"(%arg0, [[CST]]) // CHECK-NEXT: return [[ADD_2]], %arg1, [[ADD]], [[TENSOR_MAP_INSERT_RESULT]]
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 39.9K bytes - Viewed (0)