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Results 1 - 10 of 12 for MOVV (0.04 sec)
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src/runtime/duff_loong64.s
MOVV R0, (R20) ADDV $8, R20 MOVV R0, (R20) ADDV $8, R20 MOVV R0, (R20) ADDV $8, R20 MOVV R0, (R20) ADDV $8, R20 MOVV R0, (R20) ADDV $8, R20 MOVV R0, (R20) ADDV $8, R20 MOVV R0, (R20) ADDV $8, R20 MOVV R0, (R20) ADDV $8, R20 MOVV R0, (R20) ADDV $8, R20 MOVV R0, (R20) ADDV $8, R20 MOVV R0, (R20) ADDV $8, R20 MOVV R0, (R20) ADDV $8, R20 MOVV R0, (R20)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 21 19:04:21 UTC 2023 - 11.9K bytes - Viewed (0) -
src/runtime/asm_mips64x.s
CALL runtime·wbBufFlush(SB) MOVV 8(R29), R20 MOVV 16(R29), R21 MOVV 24(R29), R3 MOVV 32(R29), R4 MOVV 40(R29), R5 MOVV 48(R29), R6 MOVV 56(R29), R7 MOVV 64(R29), R8 MOVV 72(R29), R9 MOVV 80(R29), R10 MOVV 88(R29), R11 MOVV 96(R29), R12 MOVV 104(R29), R13 MOVV 112(R29), R14 MOVV 120(R29), R15 MOVV 128(R29), R16 MOVV 136(R29), R17 MOVV 144(R29), R18
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Nov 06 19:45:59 UTC 2023 - 24.3K bytes - Viewed (0) -
src/runtime/sys_linux_loong64.s
// so this function is reentrant. MOVV m_vdsoPC(R24), R11 MOVV m_vdsoSP(R24), R7 MOVV R11, 8(R3) MOVV R7, 16(R3) MOVV $ret-8(FP), R11 // caller's SP MOVV R1, m_vdsoPC(R24) MOVV R11, m_vdsoSP(R24) MOVV m_curg(R24), R4 MOVV g, R5 BNE R4, R5, noswitch MOVV m_g0(R24), R4 MOVV (g_sched+gobuf_sp)(R4), R25 // Set SP to g0 stack noswitch:
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Aug 25 20:58:13 UTC 2023 - 14.2K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/mips64.s
//inst: // // load ints and bytes // // LMOVV rreg ',' rreg // { // outcode(int($1), &$2, 0, &$4); // } MOVV R25, R17 // 00198825 MOVV R1, R2 // 00011025 MOVV LO, R1 // 00000812 MOVV HI, R1 // 00000810 MOVV R1, LO // 00200013 MOVV R1, HI // 00200011 // LMOVW rreg ',' rreg // { // outcode(int($1), &$2, 0, &$4); // } MOVW R1, R2 // 00011004
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Aug 08 12:17:12 UTC 2023 - 12.4K bytes - Viewed (0) -
src/runtime/asm_loong64.s
MOVV R9, 72(R3) MOVV R10, 80(R3) MOVV R11, 88(R3) MOVV R12, 96(R3) // R13 already saved MOVV R14, 104(R3) MOVV R15, 112(R3) MOVV R16, 120(R3) MOVV R17, 128(R3) MOVV R18, 136(R3) // R19 already saved MOVV R20, 144(R3) MOVV R21, 152(R3) // R22 is g. MOVV R23, 160(R3) MOVV R24, 168(R3) MOVV R25, 176(R3) MOVV R26, 184(R3) // R27 already saved // R28 already saved.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon May 13 15:04:25 UTC 2024 - 26.5K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 21 19:04:19 UTC 2023 - 25.2K bytes - Viewed (0) -
src/cmd/internal/obj/loong64/obj.go
// symbol in the Go sense, and p.Sym.Local is true for a few // internally defined symbols. if p.From.Type == obj.TYPE_ADDR && p.From.Name == obj.NAME_EXTERN && !p.From.Sym.Local() { // MOVV $sym, Rx becomes MOVV sym@GOT, Rx // MOVV $sym+<off>, Rx becomes MOVV sym@GOT, Rx; ADD <off>, Rx if p.As != AMOVV { ctxt.Diag("do not know how to handle TYPE_ADDR in %v with -shared", p) } if p.To.Type != obj.TYPE_REG {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 21 19:22:18 UTC 2023 - 19.7K bytes - Viewed (0) -
src/runtime/mkpreempt.go
} func genMIPS(_64bit bool) { mov := "MOVW" movf := "MOVF" add := "ADD" sub := "SUB" r28 := "R28" regsize := 4 softfloat := "GOMIPS_softfloat" if _64bit { mov = "MOVV" movf = "MOVD" add = "ADDV" sub = "SUBV" r28 = "RSB" regsize = 8 softfloat = "GOMIPS64_softfloat" } // Add integer registers R1-R22, R24-R25, R28
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Nov 20 17:19:36 UTC 2023 - 15.3K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/LOONG64.rules
&& !config.noDuffDevice && logLargeCopy(v, s) => (DUFFCOPY [16 * (128 - s/8)] dst src mem) // 16 and 128 are magic constants. 16 is the number of bytes to encode: // MOVV (R1), R23 // ADDV $8, R1 // MOVV R23, (R2) // ADDV $8, R2 // and 128 is the number of such blocks. See runtime/duff_mips64.s:duffcopy. // large or unaligned move uses a loop (Move [s] {t} dst src mem)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 21 19:26:25 UTC 2023 - 31.8K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/MIPS64.rules
&& !config.noDuffDevice && logLargeCopy(v, s) => (DUFFCOPY [16 * (128 - s/8)] dst src mem) // 16 and 128 are magic constants. 16 is the number of bytes to encode: // MOVV (R1), R23 // ADDV $8, R1 // MOVV R23, (R2) // ADDV $8, R2 // and 128 is the number of such blocks. See runtime/duff_mips64.s:duffcopy. // large or unaligned move uses a loop (Move [s] {t} dst src mem)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Jul 31 03:59:48 UTC 2023 - 41.9K bytes - Viewed (0)