MOVQ dig+0(FP), BP
	ADDL (0*4)(BP), R8  // H0 = a + H0
	MOVL R8, (0*4)(BP)
	ADDL (1*4)(BP), R9  // H1 = b + H1
	MOVL R9, (1*4)(BP)
	ADDL (2*4)(BP), R10 // H2 = c + H2
	MOVL R10, (2*4)(BP)
	ADDL (3*4)(BP), R11 // H3 = d + H3
	MOVL R11, (3*4)(BP)
	ADDL (4*4)(BP), R12 // H4 = e + H4
	MOVL R12, (4*4)(BP)
	ADDL (5*4)(BP), R13 // H5 = f + H5
	MOVL R13, (5*4)(BP)

	MOVQ dig+0(FP), BP
	ADDL (0*4)(BP), R8  // H0 = a + H0
	MOVL R8, (0*4)(BP)
	ADDL (1*4)(BP), R9  // H1 = b + H1
	MOVL R9, (1*4)(BP)
	ADDL (2*4)(BP), R10 // H2 = c + H2
	MOVL R10, (2*4)(BP)
	ADDL (3*4)(BP), R11 // H3 = d + H3
	MOVL R11, (3*4)(BP)
	ADDL (4*4)(BP), R12 // H4 = e + H4
	MOVL R12, (4*4)(BP)
	ADDL (5*4)(BP), R13 // H5 = f + H5
	MOVL R13, (5*4)(BP)

	ROUND4(AX, BX, CX, DX, BP, 75)
	ROUND4(BP, AX, BX, CX, DX, 76)
	ROUND4(DX, BP, AX, BX, CX, 77)
	ROUND4(CX, DX, BP, AX, BX, 78)
	ROUND4(BX, CX, DX, BP, AX, 79)

	ADDL	R11, AX
	ADDL	R12, BX
	ADDL	R13, CX
	ADDL	R14, DX
	ADDL	R15, BP

	ADDQ	$64, SI
	CMPQ	SI, DI
	JB	loop

end:
	MOVQ	dig+0(FP), DI
	MOVL	AX, (0*4)(DI)
	MOVL	BX, (1*4)(DI)
	MOVL	CX, (2*4)(DI)
	MOVL	DX, (3*4)(DI)

	// 386/sse2: `MOVSD\tX[0-9]+, 8\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*[18]\)`
	y[16*i+1] = t
}

func idxLoadPlusOp32(x []int32, i int) int32 {
	s := x[0]
	// 386: `ADDL\t4\([A-Z]+\)\([A-Z]+\*4\), [A-Z]+`
	// amd64: `ADDL\t4\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*4\), [A-Z]+[0-9]*`
	s += x[i+1]
	// 386: `SUBL\t8\([A-Z]+\)\([A-Z]+\*4\), [A-Z]+`
	// amd64: `SUBL\t8\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*4\), [A-Z]+[0-9]*`
	s -= x[i+2]

	// amd64:`SUBQ\s[A-Z]+,\s24\([A-Z]+\)`
	arr[3] -= b
	// 386:`DECL\s16\([A-Z]+\)`
	arr[4]--
	// 386:`ADDL\s[$]-20,\s20\([A-Z]+\)`
	arr[5] -= 20
	// 386:`SUBL\s\([A-Z]+\)\([A-Z]+\*4\),\s[A-Z]+`
	ef -= arr[b]
	// 386:`SUBL\s[A-Z]+,\s\([A-Z]+\)\([A-Z]+\*4\)`
	arr[c] -= b
	// 386:`ADDL\s[$]-15,\s\([A-Z]+\)\([A-Z]+\*4\)`
	arr[d] -= 15
	// 386:`DECL\s\([A-Z]+\)\([A-Z]+\*4\)`
	arr[b]--
	// amd64:`DECQ\s64\([A-Z]+\)`

	/* copy return values back */		\
	MOVL	stackArgsType+0(FP), DX;		\
	MOVL	stackArgs+8(FP), DI;		\
	MOVL	stackArgsSize+12(FP), CX;		\
	MOVL	stackRetOffset+16(FP), BX;		\
	MOVL	SP, SI;				\
	ADDL	BX, DI;				\
	ADDL	BX, SI;				\
	SUBL	BX, CX;				\
	CALL	callRet<>(SB);			\
	RET

// callRet copies return values back at the end of call*. This is a
// separate function so it can allocate stack space for the arguments

#define ctx DX
#define ctrPtr CX
#define ptx SI
#define ks AX
#define tPtr R8
#define ptxLen R9
#define aluCTR R10
#define aluTMP R11
#define aluK R12
#define NR R13

#define increment(i) ADDL $1, aluCTR; MOVL aluCTR, aluTMP; XORL aluK, aluTMP; BSWAPL aluTMP; MOVL aluTMP, (3*4 + 8*16 + i*16)(SP)
#define aesRnd(k) AESENC k, B0; AESENC k, B1; AESENC k, B2; AESENC k, B3; AESENC k, B4; AESENC k, B5; AESENC k, B6; AESENC k, B7

// Add
TEXT	sync∕atomic·AddInt32(SB), NOSPLIT|NOFRAME, $0-20
	GO_ARGS
	MOVQ	$__tsan_go_atomic32_fetch_add(SB), AX
	CALL	racecallatomic<>(SB)
	MOVL	add+8(FP), AX	// convert fetch_add to add_fetch
	ADDL	AX, ret+16(FP)
	RET

TEXT	sync∕atomic·AddInt64(SB), NOSPLIT|NOFRAME, $0-24
	GO_ARGS
	MOVQ	$__tsan_go_atomic64_fetch_add(SB), AX
	CALL	racecallatomic<>(SB)
	MOVQ	add+8(FP), AX	// convert fetch_add to add_fetch

	// can be inferred from a register arguments. For example,
	// add $1, %ebx has no suffix because you can tell from the
	// 32-bit register destination that it is a 32-bit add,
	// but in addl $1, (%ebx), the destination is memory, so the
	// size is not evident without the l suffix.
	needSuffix := true
SuffixLoop:
	for i, a := range inst.Args {
		if a == nil {
			break
		}

//go:noinline
func invalidMul_ssa(x uint32) uint32 {
	return x * y * y * y * y * y * y * y * y * y * y * y * y * y * y * y * y * y
}

// testLargeConst tests a situation where larger than 32 bit consts were passed to ADDL
// causing an invalid instruction error.
func testLargeConst(t *testing.T) {
	if want, got := uint32(268435440), invalidAdd_ssa(1); want != got {
		t.Errorf("testLargeConst add failed, wanted %d got %d", want, got)
	}