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src/cmd/asm/internal/asm/testdata/mips64.s
// // floating point conditional branch // // LBRA rel label4: BFPT 1(PC) // BFPT 1(PC) // 4501000100000000 BFPT label4 // BFPT 24 // 4501fffd00000000 //inst: // // load ints and bytes // // LMOVV rreg ',' rreg // { // outcode(int($1), &$2, 0, &$4); // } MOVV R25, R17 // 00198825 MOVV R1, R2 // 00011025 MOVV LO, R1 // 00000812 MOVV HI, R1 // 00000810
Others - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Tue Aug 08 12:17:12 GMT 2023 - 12.4K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/s390x.s
LAX R7, R8, (R9) // eb87900000f7 LAXG R10, R11, (R12) // ebbac00000e7 LAO R1, R2, (R3) // eb21300000f6 LAOG R4, R5, (R6) // eb54600000e6 // load and store multiple LMG n-8(SP), R3, R4 // eb34f0100004 LMG -5(R5), R3, R4 // eb345ffbff04 LMY n-8(SP), R3, R4 // 9834f010 LMY 4096(R1), R3, R4 // eb3410000198
Others - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Wed Nov 22 03:55:32 GMT 2023 - 21.6K bytes - Viewed (0) -
doc/asm.html
an OS- and architecture-dependent macro <code>get_tls</code> for accessing this register. The <code>get_tls</code> macro takes one argument, which is the register to load the <code>g</code> pointer into. </p> <p> For example, the sequence to load <code>g</code> and <code>m</code> using <code>CX</code> looks like this: </p> <pre> #include "go_tls.h" #include "go_asm.h" ... get_tls(CX)
HTML - Registered: Tue May 07 11:14:38 GMT 2024 - Last Modified: Tue Nov 28 19:15:27 GMT 2023 - 36.3K bytes - Viewed (0) -
src/cmd/api/main_test.go
context.GOOS: true, context.GOARCH: true, } if context.CgoEnabled { ctags["cgo"] = true } for _, tag := range context.BuildTags { ctags[tag] = true } // TODO: ReleaseTags (need to load default) key := dir // explicit on GOOS and GOARCH as global cache will use "all" cached packages for // an indirect imported package. See https://github.com/golang/go/issues/21181 // for more detail.
Go - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Tue Apr 09 20:48:51 GMT 2024 - 31.4K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/riscv64.s
MOVF F0, 4(X5) // 27a20200 MOVF F0, F1 // d3000020 MOVD 4(X5), F0 // 07b04200 MOVD F0, 4(X5) // 27b20200 MOVD F0, F1 // d3000022 // TLS load with local-exec (LUI + ADDIW + ADD of TP + load) MOV tls(SB), X5 // b70f00009b8f0f00b38f4f0083b20f00 MOVB tls(SB), X5 // b70f00009b8f0f00b38f4f0083820f00 // TLS store with local-exec (LUI + ADDIW + ADD of TP + store)
Others - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Fri Mar 22 04:42:21 GMT 2024 - 16.7K bytes - Viewed (1) -
src/cmd/asm/internal/asm/testdata/arm64error.s
Others - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Fri Dec 08 03:28:17 GMT 2023 - 37.8K bytes - Viewed (0)