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src/cmd/asm/internal/asm/operand_test.go
var amd64BadOperandTests = []badOperandTest{ {"[", "register list: expected ']', found EOF"}, {"[4", "register list: bad low register in `[4`"}, {"[]", "register list: bad low register in `[]`"}, {"[f-x]", "register list: bad low register in `[f`"}, {"[r10-r13]", "register list: bad low register in `[r10`"}, {"[k3-k6]", "register list: bad low register in `[k3`"}, {"[X0]", "register list: expected '-' after `[X0`, found ']'"},
Go - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Tue Aug 29 18:31:05 GMT 2023 - 23.9K bytes - Viewed (0) -
misc/wasm/wasm_exec.js
this._nextCallbackTimeoutID++; this._scheduledTimeouts.set(id, setTimeout( () => { this._resume(); while (this._scheduledTimeouts.has(id)) { // for some reason Go failed to register the timeout event, log and try again // (temporary workaround for https://github.com/golang/go/issues/28975) console.warn("scheduleTimeoutEvent: missed timeout event"); this._resume(); }
JavaScript - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Mon May 22 17:47:47 GMT 2023 - 16.3K bytes - Viewed (1) -
src/cmd/asm/internal/arch/arch.go
// General registers with ABI names. register["ZERO"] = riscv.REG_ZERO register["RA"] = riscv.REG_RA register["SP"] = riscv.REG_SP register["GP"] = riscv.REG_GP register["TP"] = riscv.REG_TP register["T0"] = riscv.REG_T0 register["T1"] = riscv.REG_T1 register["T2"] = riscv.REG_T2 register["S0"] = riscv.REG_S0 register["S1"] = riscv.REG_S1 register["A0"] = riscv.REG_A0 register["A1"] = riscv.REG_A1
Go - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Tue Mar 21 06:51:28 GMT 2023 - 21.3K bytes - Viewed (0) -
doc/asm.html
Some symbols, such as <code>R1</code> or <code>LR</code>, are predefined and refer to registers. The exact set depends on the architecture. </p> <p> There are four predeclared symbols that refer to pseudo-registers. These are not real registers, but rather virtual registers maintained by the toolchain, such as a frame pointer. The set of pseudo-registers is the same for all architectures: </p> <ul> <li>
HTML - Registered: Tue May 07 11:14:38 GMT 2024 - Last Modified: Tue Nov 28 19:15:27 GMT 2023 - 36.3K bytes - Viewed (0) -
src/archive/zip/reader.go
if !filepath.IsLocal(f.Name) || strings.Contains(f.Name, `\`) { zipinsecurepath.IncNonDefault() return ErrInsecurePath } } } return nil } // RegisterDecompressor registers or overrides a custom decompressor for a // specific method ID. If a decompressor for a given method is not found, // [Reader] will default to looking up the decompressor at the package level.
Go - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Fri Oct 13 18:36:46 GMT 2023 - 27.7K bytes - Viewed (0) -
src/cmd/asm/internal/asm/parse.go
p.errorf("register list: bad low register in `[%s`", loName) } return } if tok := p.next().ScanToken; tok != '-' { p.errorf("register list: expected '-' after `[%s`, found %s", loName, tok) return } hiName := p.next().String() hi, ok := p.arch.Register[hiName] if !ok { p.errorf("register list: bad high register in `[%s-%s`", loName, hiName) return }
Go - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Wed Feb 21 14:34:57 GMT 2024 - 36.9K bytes - Viewed (0) -
src/cmd/asm/internal/arch/arm64.go
} } return 0, false } // ARM64RegisterShift constructs an ARM64 register with shift operation. func ARM64RegisterShift(reg, op, count int16) (int64, error) { // the base register of shift operations must be general register. if reg > arm64.REG_R31 || reg < arm64.REG_R0 { return 0, errors.New("invalid register for shift operation") } return int64(reg&31)<<16 | int64(op)<<22 | int64(uint16(count)), nil }
Go - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Thu Sep 29 09:04:58 GMT 2022 - 10.4K bytes - Viewed (0) -
src/archive/zip/writer.go
// of f's entire archive. See #65499. fh := f.FileHeader fw, err := w.CreateRaw(&fh) if err != nil { return err } _, err = io.Copy(fw, r) return err } // RegisterCompressor registers or overrides a custom compressor for a specific // method ID. If a compressor for a given method is not found, [Writer] will // default to looking up the compressor at the package level.
Go - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Thu Apr 04 14:28:57 GMT 2024 - 19.3K bytes - Viewed (0) -
doc/go_mem.html
i := *p if i < 0 || i >= len(funcs) { panic("invalid function index") } ... complex code ... // compiler must NOT reload i = *p here funcs[i]() </pre> <p> If the complex code needs many registers, a compiler for single-threaded programs could discard <code>i</code> without saving a copy and then reload <code>i = *p</code> just before <code>funcs[i]()</code>.
HTML - Registered: Tue May 07 11:14:38 GMT 2024 - Last Modified: Mon Mar 04 15:54:42 GMT 2024 - 26.6K bytes - Viewed (0) -
src/cmd/asm/internal/asm/asm.go
// both 1st operand and 3rd operand are (Rs, Rs+1) register pair. // And the register pair must be contiguous. if (a[0].Type != obj.TYPE_REGREG) || (a[2].Type != obj.TYPE_REGREG) { p.errorf("invalid addressing modes for 1st or 3rd operand to %s instruction, must be register pair", op) return } // For ARM64 CASP-like instructions, its 2nd destination operand is register pair(Rt, Rt+1) that can
Go - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Wed Feb 21 14:34:57 GMT 2024 - 25.3K bytes - Viewed (0)