- Sort Score
- Result 10 results
- Languages All
Results 1 - 10 of 14 for Dadd (0.03 sec)
-
tensorflow/compiler/mlir/quantization/stablehlo/tests/components/tf_to_stablehlo.mlir
// CHECK: %[[BROADCAST_1:.*]] = stablehlo.broadcast_in_dim %[[CONST_1]], dims = [3] : (tensor<8xf32>) -> tensor<1x1x2x8xf32> // CHECK: %[[ADD:.*]] = stablehlo.add %[[MUL]], %[[BROADCAST_1]] : tensor<1x1x2x8xf32> // CHECK: return %[[ADD]] : tensor<1x1x2x8xf32> // ----- func.func @fuse_conv_batchnorm(%arg_0: tensor<1x3x4x3xf32>) -> (tensor<1x3x2x2xf32>) {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Apr 08 20:05:12 UTC 2024 - 13.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/hoist_loop_invariant.mlir
// conditions are also hoisted (i.e., `tf.Add` and `tf.Mul`). // CHECK-LABEL: readvariableop_is_hoisted_if_readonly // CHECK: [[CST_0:%.*]] = "tf.Const" // CHECK: [[VAR:%.*]] = "tf.VarHandleOp" // CHECK: [[CST_1:%.*]] = "tf.Const" // CHECK: [[VAR_VAL:%.*]] = "tf.ReadVariableOp" // CHECK: [[RES_1:%.*]] = "tf.Add"([[VAR_VAL]], [[CST_0]])
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Aug 22 17:12:02 UTC 2023 - 14.2K bytes - Viewed (0) -
ci/devinfra/docker_windows/Dockerfile
"--add", "Microsoft.VisualStudio.Workload.VCTools", \ "--add", "Microsoft.VisualStudio.Component.VC.Tools.x86.x64", \ "--add", "Microsoft.VisualStudio.Component.Windows10SDK.19041" -Wait; \ Start-Process -FilePath C:/TEMP/vs_buildtools.exe -ArgumentList "--installPath", "C:/VS", \ "--quiet", "--wait", "--nocache", "--includeOptional", \
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri Aug 18 17:24:20 UTC 2023 - 13.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/stablehlo/tests/unfuse_mhlo_batch_norm.mlir
%mean: tensor<256xf32>, %variance: tensor<256xf32>) -> (tensor<4x256xf32>) { // CHECK-DAG: %[[EPS_BCAST:.+]] = mhlo.constant dense<1.001000e-05> : tensor<256xf32> // CHECK-DAG: %[[VARIANCE_EPS:.+]] = mhlo.add %[[VARIANCE]], %[[EPS_BCAST]] : tensor<256xf32> // CHECK-DAG: %[[VARIANCE_EPS_RSQRT:.+]] = mhlo.rsqrt %[[VARIANCE_EPS]] : tensor<256xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Sat Apr 06 15:32:52 UTC 2024 - 10.4K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/tfl_while_outline.mlir
%1 = tfl.add %arg1, %arg1 {fused_activation_function = "NONE"} : tensor<*xf32> func.return %0, %1, %arg2 : tensor<*xi32>, tensor<*xf32>, tensor<i32> } // CHECK-LABEL: func private @WhileOp_cond( // CHECK: tfl.greater // CHECK-LABEL: func private @WhileOp_body( // CHECK: tfl.sub // CHECK: tfl.add // -----
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 02 09:41:17 UTC 2024 - 13.5K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/const-fold.mlir
// CHECK: %0 = tfl.add %[[CST]], %[[CST_0]] {fused_activation_function = "SIGN_BIT"} : tensor<4xf32> %5 = "tfl.add"(%0, %1) {fused_activation_function = "NONE"} : (tensor< f32>, tensor< f32>) -> tensor< f32> %6 = "tfl.add"(%0, %3) {fused_activation_function = "NONE"} : (tensor< f32>, tensor<4xf32>) -> tensor<4xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 02 09:41:17 UTC 2024 - 45.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/update_control_dependencies.mlir
%graph:2 = tf_executor.graph { %add1, %add1_control = tf_executor.island wraps "tf.Add"(%arg0, %arg1) : (tensor<*xi32>, tensor<i32>) -> tensor<*xi32> %add2, %add2_control = tf_executor.island wraps "tf.Add"(%add1, %arg1) : (tensor<*xi32>, tensor<i32>) -> tensor<*xi32> tf_executor.fetch %add1, %add2 : tensor<*xi32>, tensor<*xi32> }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri Nov 03 18:12:49 UTC 2023 - 25.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/tfrt/tests/mlrt/tf_to_mlrt.mlir
func.func @branch0(%arg0: tensor<f32>, %arg1: tensor<f32>) -> tensor<f32> { %0 = "tf.Add" (%arg0, %arg1) {__op_key = 1, device = "/device:CPU:0"} : (tensor<f32>, tensor<f32>) -> tensor<f32> func.return %0 : tensor<f32> } // CHECK-LABEL: @branch1 func.func @branch1(%arg0: tensor<f32>, %arg1: tensor<f32>) -> tensor<f32> { %0 = "tf.Add" (%arg0, %arg1) {__op_key = 2, device = "/device:CPU:0"} : (tensor<f32>, tensor<f32>) -> tensor<f32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri May 31 20:44:15 UTC 2024 - 24.7K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/schema/schema.fbs
// limitations under the License. // Revision History // Version 0: Initial version. // Version 1: Add subgraphs to schema. // Version 2: Rename operators to conform to NN API. // Version 3: Move buffer data from Model.Subgraph.Tensors to Model.Buffers. // Version 3a: Add new builtin op code field. Has backward compatibility with // version 3.
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri May 03 18:01:23 UTC 2024 - 41.7K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/tests/duplicate_shape_determining_constants.mlir
// Check that there are no extra "tf.Const"s existing in this function. // CHECK-NOT: "tf.Const" // Check that the usages of %[[CST]] and %[[CST_0]] are untouched. // CHECK: %[[ADD:.*]] = "tf.AddV2"(%[[CST]], %[[CST_0]]) // CHECK: "tf.Max"({{.*}}, %[[ADD]]) // ----- // CHECK-LABEL: @recursively_duplicate_constants func.func private @recursively_duplicate_constants(%arg0: tensor<1x2x3xf32>) -> tensor<1x3xf32> {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Nov 24 07:44:46 UTC 2022 - 11K bytes - Viewed (0)