func (bp *BytePoolCap) Populate() {
	for _, buf := range reedsolomon.AllocAligned(cap(bp.c), bp.wcap) {
		bp.Put(buf[:bp.w])
	}
}

// Get gets a []byte from the BytePool, or creates a new one if none are
// available in the pool.
func (bp *BytePoolCap) Get() (b []byte) {
	if bp == nil {
		return nil
	}
	select {
	case b = <-bp.c:
		// reuse existing buffer
	default:

	VGATHERPF0QPS K2, (BP)(Z10*2)                      // 62b27d4ac74c5500
	VGATHERPF0QPS K2, (R10)(Z29*8)                     // 62927d42c70cea
	VGATHERPF0QPS K2, (R14)(Z29*8)                     // 62927d42c70cee
	VGATHERPF1DPD K2, (R14)(Y29*8)                     // 6292fd42c614ee
	VGATHERPF1DPD K2, (AX)(Y4*1)                       // 62f2fd4ac61420
	VGATHERPF1DPD K2, (BP)(Y10*2)                      // 62b2fd4ac6545500

	VPGATHERQQ (BP)(X2*2), K1, X2   // ERROR "index and destination registers should be distinct"
	VPGATHERQQ (BP)(Y15*2), K1, Y15 // ERROR "index and destination registers should be distinct"
	VPGATHERQQ (BP)(Z20*2), K1, Z20 // ERROR "index and destination registers should be distinct"
	VPGATHERDQ (BP)(X2*2), K1, X2   // ERROR "index and destination registers should be distinct"

	bp.Put(make([]byte, bp.w, bp.wcap+1)) // wrong capacity is rejected (more)
	bp.Put(make([]byte, width))           // wrong capacity is rejected (very less)
	if len(bp.c) > 0 {
		t.Fatal("bytepool should have rejected invalid packets")
	}

	// Try putting a short slice into pool
	bp.Put(make([]byte, bp.w, bp.wcap)[:2])
	if len(bp.c) != 1 {
		t.Fatal("bytepool should have accepted short slice with sufficient capacity")
	}

	V4FMADDPS -17(BP)(SI*4), [Z0-Z3], K2, Z0           // 62f27f4a9a84b5efffffff
	V4FMADDPS 17(SP), [Z10-Z13], K2, Z0                // 62f22f4a9a842411000000
	V4FMADDPS -17(BP)(SI*4), [Z10-Z13], K2, Z0         // 62f22f4a9a84b5efffffff
	V4FMADDPS 17(SP), [Z20-Z23], K2, Z0                // 62f25f429a842411000000
	V4FMADDPS -17(BP)(SI*4), [Z20-Z23], K2, Z0         // 62f25f429a84b5efffffff

	VPCLMULQDQ $127, X7, X21, X15                      // 6273550044ff7f or 6273d50044ff7f
	VPCLMULQDQ $127, X19, X21, X15                     // 6233550044fb7f or 6233d50044fb7f
	VPCLMULQDQ $127, -17(BP)(SI*8), X21, X15           // 6273550044bcf5efffffff7f or 6273d50044bcf5efffffff7f
	VPCLMULQDQ $127, (R15), X21, X15                   // 62535500443f7f or 6253d500443f7f

			"#define KEYROUND(xmm, load, off, r1, r2, index) \\",
			"\tMOVBLZX	(BP)(DX*4),	R8 \\",
			"\tload((off+1), r2) \\",
			"\tMOVB	R8,		(off*4)(R12) \\",
			"\tPINSRW	$index, (BP)(R8*4), xmm",
			"#define LOAD(off, reg) \\",
			"\tMOVBLZX	(off*4)(R12),	reg \\",
			"\tADDB	reg,		DX",
			"KEYROUND(X0, LOAD, 8, AX, BX, 0)",
		),

	VPOPCNTQ -17(BP)(SI*4), K2, Z20                    // 62e2fd4a55a4b5efffffff
	VPOPCNTQ Z1, K2, Z9                                // 6272fd4a55c9
	VPOPCNTQ Z3, K2, Z9                                // 6272fd4a55cb
	VPOPCNTQ 17(SP), K2, Z9                            // 6272fd4a558c2411000000
	VPOPCNTQ -17(BP)(SI*4), K2, Z9                     // 6272fd4a558cb5efffffff