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Results 1 - 10 of 11 for X0 (0.01 sec)

  1. src/cmd/asm/internal/asm/line_test.go

    		// Test AVX512 suffixes.
    		{"VADDPD.A X0, X1, X2", `unknown suffix "A"`},
    		{"VADDPD.A.A X0, X1, X2", `unknown suffix "A"; duplicate suffix "A"`},
    		{"VADDPD.A.A.A X0, X1, X2", `unknown suffix "A"; duplicate suffix "A"`},
    		{"VADDPD.A.B X0, X1, X2", `unknown suffix "A"; unknown suffix "B"`},
    		{"VADDPD.Z.A X0, X1, X2", `Z suffix should be the last; unknown suffix "A"`},
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Tue Aug 29 07:48:38 UTC 2023
    - 1.9K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/testdata/avx512enc/vpclmulqdq_avx512f.s

    	VPCLMULQDQ $127, X22, X0, X0                       // 62b37d0844c67f or 62b3fd0844c67f
    	VPCLMULQDQ $127, X19, X0, X0                       // 62b37d0844c37f or 62b3fd0844c37f
    	VPCLMULQDQ $127, X22, X28, X0                      // 62b31d0044c67f or 62b39d0044c67f
    	VPCLMULQDQ $127, X7, X28, X0                       // 62f31d0044c77f or 62f39d0044c77f
    	VPCLMULQDQ $127, X19, X28, X0                      // 62b31d0044c37f or 62b39d0044c37f
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Tue May 22 14:57:15 UTC 2018
    - 8.2K bytes
    - Viewed (0)
  3. src/cmd/asm/internal/asm/testdata/amd64error.s

    	VADDSUBPD X20, X1, X2           // ERROR "invalid instruction"
    	VADDSUBPS X0, X20, X2           // ERROR "invalid instruction"
    	// Use of K0 for write mask (Yknot0).
    	// TODO(quasilyte): improve error message (#21860).
    	//                  "K0 can't be used for write mask"
    	VADDPD X0, X1, K0, X2           // ERROR "invalid instruction"
    	VADDPD Y0, Y1, K0, Y2           // ERROR "invalid instruction"
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Wed Jun 14 00:03:57 UTC 2023
    - 8.9K bytes
    - Viewed (0)
  4. src/cmd/asm/internal/asm/testdata/386.s

    // LTYPEI spec7	{ outcode(int($1), &$2); }
    	IMULL	AX
    	IMULL	$4, CX
    	IMULL	AX, BX
    
    // LTYPEXC spec9	{ outcode(int($1), &$2); }
    	CMPPD	X0, X1, 4
    	CMPPD	foo+4(SB), X1, 4
    
    // LTYPEX spec10	{ outcode(int($1), &$2); }
    	PINSRD	$1, (AX), X0
    	PINSRD	$2, foo+4(FP), X0
    
    // Was bug: LOOP is a branch instruction.
    	JCS	2(PC)
    loop:
    	LOOP	loop // LOOP
    
    // Tests for TLS reference.
    	MOVL    (TLS), AX
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Tue Apr 09 18:57:21 UTC 2019
    - 2K bytes
    - Viewed (0)
  5. src/cmd/asm/internal/asm/testdata/avx512enc/avx512_vpopcntdq.s

    	VPOPCNTQ X0, K4, X23                               // 62e2fd0c55f8
    	VPOPCNTQ 99(R15)(R15*4), K4, X23                   // 6282fd0c55bcbf63000000
    	VPOPCNTQ 15(DX), K4, X23                           // 62e2fd0c55ba0f000000
    	VPOPCNTQ X24, K4, X11                              // 6212fd0c55d8
    	VPOPCNTQ X14, K4, X11                              // 6252fd0c55de
    	VPOPCNTQ X0, K4, X11                               // 6272fd0c55d8
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Tue May 22 14:57:15 UTC 2018
    - 5.5K bytes
    - Viewed (0)
  6. src/cmd/asm/internal/asm/testdata/avx512enc/avx512_4fmaps.s

    	V4FMADDPS 17(SP), [Z20-Z23], K2, Z8                // 62725f429a842411000000
    	V4FMADDPS -17(BP)(SI*4), [Z20-Z23], K2, Z8         // 62725f429a84b5efffffff
    	V4FMADDSS 7(AX), [X0-X3], K5, X22                  // 62e27f0d9bb007000000 or 62e27f2d9bb007000000 or 62e27f4d9bb007000000
    	V4FMADDSS (DI), [X0-X3], K5, X22                   // 62e27f0d9b37 or 62e27f2d9b37 or 62e27f4d9b37
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Tue May 22 14:57:15 UTC 2018
    - 5.9K bytes
    - Viewed (0)
  7. src/cmd/asm/internal/asm/testdata/amd64dynlinkerror.s

    	RET
    TEXT ·a28(SB), 0, $0-0
    	CMPL runtime·writeBarrier(SB), $0
    	PEXTRD $0, X0, R15
    	ADDQ $1, R15
    	RET
    TEXT ·a29(SB), 0, $0-0
    	CMPL runtime·writeBarrier(SB), $0
    	VPEXTRD $0, X0, R15
    	ADDQ $1, R15
    	RET
    TEXT ·a30(SB), 0, $0-0
    	CMPL runtime·writeBarrier(SB), $0
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Wed Mar 15 20:45:41 UTC 2023
    - 4.8K bytes
    - Viewed (0)
  8. src/cmd/asm/internal/lex/lex_test.go

    			"#define LOAD(off, reg) \\",
    			"\tMOVBLZX	(off*4)(R12),	reg \\",
    			"\tADDB	reg,		DX",
    			"KEYROUND(X0, LOAD, 8, AX, BX, 0)",
    		),
    		"\n.MOVBLZX.(.BP.).(.DX.*.4.).,.R8.\n.\n.MOVBLZX.(.(.8.+.1.).*.4.).(.R12.).,.BX.\n.ADDB.BX.,.DX.\n.MOVB.R8.,.(.8.*.4.).(.R12.).\n.PINSRW.$.0.,.(.BP.).(.R8.*.4.).,.X0.\n",
    	},
    	{
    		"taken #ifdef",
    		lines(
    			"#define A",
    			"#ifdef A",
    			"#define B 1234",
    			"#endif",
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Tue Aug 29 07:48:38 UTC 2023
    - 5.8K bytes
    - Viewed (0)
  9. src/cmd/asm/internal/arch/arm.go

    func ARMMRCOffset(op obj.As, cond string, x0, x1, x2, x3, x4, x5 int64) (offset int64, op0 obj.As, ok bool) {
    	op1 := int64(0)
    	if op == arm.AMRC {
    		op1 = 1
    	}
    	bits, ok := ParseARMCondition(cond)
    	if !ok {
    		return
    	}
    	offset = (0xe << 24) | // opcode
    		(op1 << 20) | // MCR/MRC
    		((int64(bits) ^ arm.C_SCOND_XOR) << 28) | // scond
    		((x0 & 15) << 8) | //coprocessor number
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Wed Oct 23 15:18:14 UTC 2024
    - 6.1K bytes
    - Viewed (0)
  10. src/cmd/api/testdata/src/pkg/p1/p1.go

    	private    *int
    	PublicTime Time
    }
    
    // Deprecated: use URI.
    type URL struct{}
    
    type EmbedURLPtr struct {
    	*URL
    }
    
    type S2 struct {
    	// Deprecated: use T.
    	S
    	Extra bool
    }
    
    var X0 int64
    
    var (
    	Y int
    	X I
    )
    
    type Namer interface {
    	Name() string
    }
    
    type I interface {
    	Namer
    	ptwo.Twoer
    	Set(name string, balance int64)
    	// Deprecated: use GetNamed.
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Fri Dec 02 16:29:41 UTC 2022
    - 3.3K bytes
    - Viewed (0)
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