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tensorflow/compiler/mlir/tensorflow/tests/remove_unused_arguments.mlir
func.func private @f(%arg0: tensor<f32>, %arg1: tensor<f32>) -> tensor<f32> { "SomeOp"(%arg1) : (tensor<f32>) -> () return %arg1 : tensor<f32> } // CHECK-LABEL: removes_first_arg func.func @removes_first_arg(%arg0: tensor<f32>, %arg1: tensor<f32>) -> tensor<f32> { // CHECK: call{{.*}}(%arg1) %1 = func.call @f(%arg0, %arg1) : (tensor<f32>, tensor<f32>) -> tensor<f32> return %1 : tensor<f32> }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Feb 06 23:00:44 UTC 2024 - 7K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/batchmatmul_to_einsum.mlir
func.func @test_batch_matmul_to_einsum(%arg0: tensor<1x2x3xf32>, %arg1: tensor<3x4xf32>) -> tensor<1x2x4xf32> { // CHECK-LABEL: test_batch_matmul_to_einsum // CHECK: "tf.Einsum"(%arg0, %arg1) <{equation = "...mk,...kn->...mn"}> : (tensor<1x2x3xf32>, tensor<3x4xf32>) -> tensor<1x2x4xf32> %0 = "tf.BatchMatMul"(%arg0, %arg1) {adj_x = false, adj_y = false} : (tensor<1x2x3xf32>, tensor<3x4xf32>) -> tensor<1x2x4xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 3K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/layout_optimization_layout_assignment_gpu_cc_60.mlir
%arg0: tensor<1x28x28x64xf32>, %arg1: tensor<64xf32> ) -> tensor<1x28x28x64xf32> { // CHECK: "tf.FusedBatchNormV3" // CHECK-SAME: (%[[X_TRANSPOSE:[0-9]*]], %arg1, %arg1, %arg1, %arg1) // CHECK-SAME: data_format = "NCHW" %y, %batch_mean, %batch_var, %reserve_1, %reserve_2, %reserve_3 = "tf.FusedBatchNormV3"(%arg0, %arg1, %arg1, %arg1, %arg1) { data_format = "NHWC",
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Jun 21 08:41:18 UTC 2022 - 5.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/legalize-tensorlist.mlir
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 02 09:41:17 UTC 2024 - 9.5K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/experimental/tac/tests/get-op-cost.mlir
// CHECK: tac.cost = 1.000000e+03 %0 = "tfl.add"(%arg0, %arg1) {fused_activation_function = "RELU", tac.device = "CPU"} : (tensor<10x10x10xf32>, tensor<10xf32>) -> tensor<10x10x10xf32> // CHECK: tac.cost = 1.000000e+03
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Mar 24 05:29:10 UTC 2022 - 5.7K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/get-arithmetic-count.mlir
} func.func @testAdd(%arg0: tensor<10x10x10xf32>, %arg1: tensor<10x10x10xf32>) -> tensor<10x10x10xf32> { // CHECK: _arithmetic_count = 1000 : i64 %0 = "tfl.add"(%arg0, %arg1) {fused_activation_function = "NONE"} : (tensor<10x10x10xf32>, tensor<10x10x10xf32>) -> tensor<10x10x10xf32> func.return %0 : tensor<10x10x10xf32> } func.func @testAddBroadcast(%arg0: tensor<10x10x10xf32>, %arg1: tensor<10xf32>) -> tensor<10x10x10xf32> {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Dec 14 04:58:17 UTC 2022 - 7.7K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/tpu_parallel_execute_sink_resource_write.mlir
// CHECK-NEXT: "tf.AssignVariableOp"([[ARG1]], [[PARALLEL_EXECUTE]]#0) "tf.AssignVariableOp"(%arg1, %0#0) : (tensor<!tf_type.resource>, tensor<i1>) -> () // CHECK-NEXT: return [[PARALLEL_EXECUTE]]#0 func.return %0#0 : tensor<i1> } // CHECK-LABEL: func @not_assign_var // CHECK-SAME: ({{.+}}: tensor<i1>, [[ARG1:%.+]]: tensor<!tf_type.resource>) func.func @not_assign_var(%arg0: tensor<i1>, %arg1: tensor<!tf_type.resource>) {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Mar 28 12:06:33 UTC 2022 - 7.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/device_canonicalize.mlir
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri Nov 04 14:07:37 UTC 2022 - 6.4K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/split-merged-operands.mlir
CHECK: %[[LSTM:[a-z0-9]*]] = "tfl.unidirectional_sequence_lstm"(%arg2, %arg0, %arg0, %arg0, %arg0, %arg0, %arg0, %arg0, %arg0, %arg1, %arg1, %arg1, %arg1, %arg1, %arg1, %arg1, %arg0, %arg1, %[[CST_0]], %[[CST_1]], %arg0, %arg0, %arg0, %arg0) <{fused_activation_function = "NONE", time_major = true}> : (tensor<4x4x4xf32>, tensor<4x4xf32>, tensor<4x4xf32>, tensor<4x4xf32>, tensor<4x4xf32>, tensor<4x4xf32>, tensor<4x4xf32>, tensor<4x4xf32>, tensor<4x4xf32>, tensor<4xf32>, tensor<4xf32>, tensor<4xf32>,...
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 02 09:41:17 UTC 2024 - 7.7K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/layout_optimization_layout_assignment_gpu_cc_70.mlir
%arg0: tensor<1x28x28x64xf32>, %arg1: tensor<64xf32> ) -> tensor<1x28x28x64xf32> { // CHECK: "tf.FusedBatchNormV3" // CHECK-SAME: (%[[X_TRANSPOSE:[0-9]*]], %arg1, %arg1, %arg1, %arg1) // CHECK-SAME: data_format = "NCHW" %y, %batch_mean, %batch_var, %reserve_1, %reserve_2, %reserve_3 = "tf.FusedBatchNormV3"(%arg0, %arg1, %arg1, %arg1, %arg1) { data_format = "NHWC",
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Jun 21 08:41:18 UTC 2022 - 8.5K bytes - Viewed (0)