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Results 1 - 5 of 5 for 1x8x32x32xf32 (0.12 sec)

  1. tensorflow/compiler/mlir/tensorflow/tests/layout_optimization_to_nchw.mlir

      // Check that Conv2D computed in NCHW format, and all redundant transpose
      // operations removed from the function.
    
      // CHECK: %[[CONV:[0-9]*]] = "tf.Conv2D"(%arg0, %arg1)
      // CHECK-SAME: data_format = "NCHW"
      // CHECK-SAME: -> tensor<1x8x32x32xf32>
    
      // CHECK: return %[[CONV]]
    
      func.return %4 : tensor<1x8x32x32xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Mar 24 05:47:26 UTC 2022
    - 1.3K bytes
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  2. tensorflow/compiler/mlir/tensorflow/tests/layout_optimization_layout_assignment_to_nchw.mlir

      // CHECK-SAME: dilations = [1, 4, 2, 3]
      // CHECK-SAME: explicit_paddings = [1, 2, 7, 8, 3, 4, 5, 6]
      // CHECK-SAME: padding = "EXPLICIT"
      // CHECK-SAME: strides = [5, 8, 6, 7]
      // CHECK-SAME: (tensor<1x3x32x32xf32>, tensor<4xi32>, tensor<1x8x32x32xf32>)
      // CHECK-SAME: -> tensor<1x1x3x8xf32>
    
      // CHECK: return %[[CONV2D_BACKPROP]]
    
      %0 = "tf.Conv2DBackpropFilter"(%input, %filter_sizes, %out_backprop)
           {
             data_format = "NHWC",
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 9K bytes
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  3. tensorflow/compiler/mlir/tensorflow/tests/layout_optimization_layout_assignment_to_nhwc.mlir

    // dilations, etc...). This test only verifies that changing convolution data
    // layout will update all the attributes.
    
    // CHECK-LABEL: func @transposeConv2D
    func.func @transposeConv2D(%input: tensor<1x3x32x32xf32>, %filter: tensor<1x1x3x8xf32>) -> tensor<1x8x7x6xf32> {
    
      // CHECK: %[[ARG_PERM:.*]] = "tf.Const"() <{value = dense<[0, 2, 3, 1]> : tensor<4xi64>}>
      // CHECK: %[[ARG_TRANSPOSE:[0-9]*]] = "tf.Transpose"(%arg0, %[[ARG_PERM]])
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 4.5K bytes
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  4. tensorflow/compiler/mlir/lite/tests/get-arithmetic-count.mlir

      func.return %0 : tensor<?x32x32x16xf32>
    }
    
    func.func @testDepthwiseConv2D(tensor<1x112x112x3xf32>, tensor<1x3x3x32xf32>, tensor<32xf32>) -> tensor<1x112x112x32xf32> {
    ^bb0(%arg0: tensor<1x112x112x3xf32>, %arg1: tensor<1x3x3x32xf32>, %arg2: tensor<32xf32>):
      // CHECK: _arithmetic_count = 7626752 : i64
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed Dec 14 04:58:17 UTC 2022
    - 7.7K bytes
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  5. tensorflow/compiler/mlir/lite/experimental/tac/tests/target-annotation.mlir

      func.return %0 : tensor<256x30x30x16xf32>
    }
    
    // -----
    
    func.func @testDepthwiseConv(%arg0: tensor<1x112x112x32xf32>, %arg1: tensor<1x3x3x32xf32>, %arg2: tensor<32xf32>) -> tensor<1x112x112x32xf32> {
      // CHECK: tac.device = "GPU", tac.inference_type = "FLOAT"
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Fri May 19 19:32:06 UTC 2023
    - 6.2K bytes
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