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Results 1 - 4 of 4 for 1x7x7x16xf32 (0.26 sec)

  1. tensorflow/compiler/mlir/lite/tests/flatbuffer2mlir/many_attribute_op.mlir

    // Confirm a wide array of attribute survives the round-trip
    func.func @main(tensor<1x6x6x16xf32>) -> tensor<1x1x1x16xf32> {
    ^bb0(%arg0: tensor<1x6x6x16xf32>):
      // CHECK: "tfl.average_pool_2d"(%{{.*}}) <{filter_height = 3 : i32, filter_width = 6 : i32, fused_activation_function = "NONE", padding = "VALID", stride_h = 3 : i32, stride_w = 1 : i32}> : (tensor<1x6x6x16xf32>) -> tensor<1x1x1x16xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 02 09:41:17 UTC 2024
    - 824 bytes
    - Viewed (0)
  2. tensorflow/compiler/mlir/lite/tests/mlir2flatbuffer/nn.mlir

    // RUN: flatbuffer_translate -mlir-to-tflite-flatbuffer %s -o - | flatbuffer_to_string - | FileCheck %s
    
    func.func @main(tensor<1x6x6x16xf32>) -> tensor<1x1x1x16xf32> {
    ^bb0(%arg0: tensor<1x6x6x16xf32>):
      // CHECK:      {
      // CHECK-NEXT:   version: 3,
      // CHECK-NEXT:   operator_codes: [ {
      // CHECK-NEXT:     deprecated_builtin_code: 1,
      // CHECK-NEXT:     version: 1,
      // CHECK-NEXT:     builtin_code: AVERAGE_POOL_2D
      // CHECK-NEXT:   } ],
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Jul 14 16:41:28 UTC 2022
    - 2.4K bytes
    - Viewed (0)
  3. tensorflow/compiler/mlir/tensorflow/tests/layout_optimization_layout_assignment_to_nhwc.mlir

             explicit_paddings = [1, 2, 3, 4, 5, 6, 7, 8],
             padding = "EXPLICIT",
             strides = [5, 6, 7, 8]
           } : (tensor<1x3x32x32xf32>, tensor<1x1x3x8xf32>) -> tensor<1x8x7x6xf32>
    
      func.return %0 : tensor<1x8x7x6xf32>
    }
    
    // CHECK-LABEL: func @transposeFusedBatchNormV3
    func.func @transposeFusedBatchNormV3(
      %arg0: tensor<1x64x28x28xf32>,
      %arg1: tensor<64xf32>
    ) -> tensor<1x64x28x28xf32> {
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 4.5K bytes
    - Viewed (0)
  4. tensorflow/compiler/mlir/tensorflow/tests/layout_optimization_layout_assignment_to_nchw.mlir

             explicit_paddings = [1, 2, 3, 4, 5, 6, 7, 8],
             padding = "EXPLICIT",
             strides = [5, 6, 7, 8]
           } : (tensor<1x32x32x3xf32>, tensor<1x1x3x8xf32>) -> tensor<1x7x7x8xf32>
    
      func.return %0 : tensor<1x7x7x8xf32>
    }
    
    // CHECK-LABEL: func @transposeConv2DWithDefaultAttr
    func.func @transposeConv2DWithDefaultAttr(%input: tensor<1x32x32x3xf32>, %filter: tensor<1x1x3x8xf32>) -> tensor<?x?x?x?xf32>
    {
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 9K bytes
    - Viewed (0)
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