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tensorflow/compiler/mlir/tensorflow/utils/cluster_util_test.cc
%1 = "tf.Relu"(%0) {device = "tpu0"} : (tensor<?xi32>) -> tensor<?xi32> %2 = "tf.Add"(%0, %1) {device = "tpu0"} : (tensor<?xi32>, tensor<?xi32>) -> tensor<?xi32> %3 = "tf.Relu"(%arg1) {device = "tpu1"} : (tensor<?xi32>) -> tensor<?xi32> %4 = "tf.Add"(%3, %arg1) {device = "tpu1"} : (tensor<?xi32>, tensor<?xi32>) -> tensor<?xi32> %5 = "tf.Relu"(%4) {device = "tpu0"} : (tensor<?xi32>) -> tensor<?xi32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri Apr 26 09:37:10 UTC 2024 - 7.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/utils/device_util_test.cc
const std::string cpu0 = "/job:worker/replica:0/task:0/device:CPU:0"; const std::string gpu0 = "/job:worker/replica:1/task:2/device:GPU:0"; const std::string gpu1 = "/job:worker/replica:1/task:2/device:GPU:1"; llvm::SmallVector<std::unique_ptr<Device>, 2> devices; devices.push_back(FakeDevice::Make(cpu0)); devices.push_back(FakeDevice::Make(gpu0, "compute capability: 7.0"));
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 9.5K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/tpu-resource-read-for-write.mlir
// CHECK-SAME: _replication_info = "write", _xla_compile_device_type = "TPU" %0:2 = "tf_device.cluster_func"(%arg0, %arg1) {_replication_info = "write", _xla_compile_device_type = "TPU", func = @write_func} : (tensor<i32>, tensor<f32>) -> (tensor<f32>, tensor<i32>) // CHECK-NEXT: "tf.AssignVariableOp"([[ARG2]], [[CLUSTER]]#1) "tf.AssignVariableOp"(%arg2, %0#1) : (tensor<*x!tf_type.resource<tensor<i32>>>, tensor<i32>) -> ()
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 02 16:54:40 UTC 2024 - 5.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/tfrt/ir/mlrt/tf_ops.td
}]; } def TFTPUCompileAndExecuteOp : TensorflowMlrt_Op<"tf_tpu_compile_and_execute", [TF_MustExecute]> { let summary = "tpu compile and execute operation"; let description = [{ tf_mlrt_tpu.compile_and_execute compiles a mlir tpu program and executes the compiled tpu program. $mlir_module is a serialized MLIR module with a `main` function that contains target computation.
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed May 22 21:35:32 UTC 2024 - 6.7K bytes - Viewed (0) -
tensorflow/compiler/mlir/tf2xla/internal/legalize_tf_mlir.h
std::vector<tpu::ShardingAndIndex>* arg_core_mapping, std::vector<std::vector<xla::Shape>>* per_core_arg_shapes); // Compiles a serialized MLIR module into XLA HLO, generates all accompanying // metadata and stores them in CompilationResult. absl::StatusOr<XlaCompilationResult> LegalizeWithMlirBridge( const tpu::MlirToHloArgs& computation, const tpu::TPUCompileMetadataProto& metadata, bool use_tuple_args,
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Sun Apr 14 20:29:34 UTC 2024 - 2.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/tf2xla/internal/legalize_tf_to_hlo.cc
#include "tensorflow/core/platform/status.h" #include "tensorflow/core/protobuf/tpu/compile_metadata.pb.h" #include "tensorflow/core/tpu/kernels/tpu_compile_op_support.h" #include "tsl/platform/statusor.h" namespace tensorflow { namespace tf2xla { namespace internal { using metrics::IncrementTfMlirBridgeSecondPhaseCounter; using metrics::MlirBridgeSecondPhaseMetric; using tpu::MlirToHloArgs; absl::StatusOr<XlaCompilationResult> LegalizeTfToHlo(
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Sun Apr 14 20:29:34 UTC 2024 - 3.7K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/convert_to_legacy_compile_and_replicate_attributes.mlir
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 02 22:03:30 UTC 2024 - 6.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/tf2xla/api/v1/compile_tf_graph.h
absl::Status CompileTensorflowGraphToHlo( const std::variant<tpu::MlirToHloArgs, tpu::FunctionToHloArgs>& computation, const tpu::TPUCompileMetadataProto& metadata, bool use_tuple_args, XlaShapeLayoutHelpers::ShapeDeterminationFns shape_determination_funcs, const std::vector<tensorflow::TensorShape>& arg_shapes, std::vector<tpu::ShardingAndIndex>* arg_core_mapping,
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Sat Apr 13 08:08:57 UTC 2024 - 2.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/tf2xla/internal/legalize_tf_to_hlo.h
#include "tensorflow/core/tpu/kernels/tpu_compile_op_support.h" #include "tsl/platform/statusor.h" namespace tensorflow { namespace tf2xla { namespace internal { // Legalize the given MLIR module to XLA HLO using a combination of the MLIR // Bridge and XlaBuilder absl::StatusOr<XlaCompilationResult> LegalizeTfToHlo( const tpu::MlirToHloArgs& computation,
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Sun Apr 14 20:29:34 UTC 2024 - 2K bytes - Viewed (0) -
tensorflow/compiler/mlir/tf2xla/internal/legalize_tf_mlir.cc
#include "tensorflow/core/platform/profile_utils/cpu_utils.h" #include "tensorflow/core/platform/types.h" #include "tensorflow/core/protobuf/tpu/compile_metadata.pb.h" #include "tensorflow/core/tpu/kernels/tpu_compile_op_support.h" #include "tensorflow/core/tpu/tpu_compile.h" #include "tsl/platform/error_logging.h" #include "tsl/platform/errors.h" #include "tsl/platform/statusor.h" namespace tensorflow {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Sun Apr 14 20:29:34 UTC 2024 - 6.1K bytes - Viewed (0)