_ S
		}{})}, true},
		{"struct{i int; _ S}", args{reflect.TypeOf(struct {
			i int
			_ S
		}{})}, false},
		{"struct{a int16; b int32}", args{reflect.TypeOf(struct {
			a int16
			b int32
		}{})}, false},
		{"struct {x int32; y int16}", args{reflect.TypeOf(struct {
			x int32
			y int16
		}{})}, false},
		{"struct {_ int32 }", args{reflect.TypeOf(struct{ _ int32 }{})}, false},
	}
	for _, tt := range tests {

				return []Value{ValueOf(yield(in[0]))}
			})
			v.Call([]Value{rf})
		}
	}
	switch v.Kind() {
	case Int:
		return rangeNum[int](v.Int())
	case Int8:
		return rangeNum[int8](v.Int())
	case Int16:
		return rangeNum[int16](v.Int())
	case Int32:
		return rangeNum[int32](v.Int())
	case Int64:
		return rangeNum[int64](v.Int())
	case Uint:
		return rangeNum[uint](v.Uint())
	case Uint8:
		return rangeNum[uint8](v.Uint())

(CMPconst [0] z:((NEG|CNTLZD|RLDICL) x)) && v.Block == z.Block => (CMPconst [0] convertPPC64OpToOpCC(z))
// Note: ADDCCconst only assembles to 1 instruction for int16 constants.
(CMPconst [0] z:(ADDconst [c] x)) && int64(int16(c)) == c && v.Block == z.Block => (CMPconst [0] convertPPC64OpToOpCC(z))
(CMPconst [0] z:(ANDconst [c] x)) && int64(uint16(c)) == c && v.Block == z.Block => (CMPconst [0] convertPPC64OpToOpCC(z))

		ppc64.ASUBME, ppc64.ASUBZECC, ppc64.ASUBZEVCC, ppc64.ASUBZEV,
		ppc64.ASUBZE:
		return true
	}
	return false
}

func ppc64RegisterNumber(name string, n int16) (int16, bool) {
	switch name {
	case "CR":
		if 0 <= n && n <= 7 {
			return ppc64.REG_CR0 + n, true
		}
	case "A":
		if 0 <= n && n <= 8 {
			return ppc64.REG_A0 + n, true
		}
	case "VS":

	REGTMP  = REG_R30 // used by the assembler
	FREGRET = REG_F0  // not use
)

var LOONG64DWARFRegisters = map[int16]int16{}

func init() {
	// f assigns dwarfregisters[from:to] = (base):(to-from+base)
	f := func(from, to, base int16) {
		for r := int16(from); r <= to; r++ {
			LOONG64DWARFRegisters[r] = (r - from) + base
		}
	}
	f(REG_R0, REG_R31, 0)
	f(REG_F0, REG_F31, 32)

}

		return true
	}
	return false
}

func IsLoong64AMO(op obj.As) bool {
	return loong64.IsAtomicInst(op)
}

func loong64RegisterNumber(name string, n int16) (int16, bool) {
	switch name {
	case "F":
		if 0 <= n && n <= 31 {
			return loong64.REG_F0 + n, true
		}
	case "FCSR":
		if 0 <= n && n <= 31 {
			return loong64.REG_FCSR0 + n, true
		}
	case "FCC":

// to the `output_buffer`. Both `model_buffer` and `output_buffer` should be a
// valid FlatBuffer format for Model supported by TFLite.
//
// The `input_type`, `output_type` and `inference_type` can be float32 / qint8 /
// int8 / int16.
//
// Returns a partially quantized model if `fully_quantize` is false. Returns a
// non-OK status if the quantization fails.
//
// When `verify_numeric` is true, the model will have it's original float ops

	aType, bType := aVal.Type(), bVal.Type()
	if aType != bType {
		return -1 // No good answer possible, but don't return 0: they're not equal.
	}
	switch aVal.Kind() {
	case reflect.Int, reflect.Int8, reflect.Int16, reflect.Int32, reflect.Int64:
		return cmp.Compare(aVal.Int(), bVal.Int())
	case reflect.Uint, reflect.Uint8, reflect.Uint16, reflect.Uint32, reflect.Uint64, reflect.Uintptr:
		return cmp.Compare(aVal.Uint(), bVal.Uint())

	{"runtime.morestack", 0},
	{"runtime.morestackc", 0},
	{"runtime.morestack_noctxt", 0},
	{"type:int8", 0},
	{"type:*int8", 0},
	{"type:uint8", 0},
	{"type:*uint8", 0},
	{"type:int16", 0},
	{"type:*int16", 0},
	{"type:uint16", 0},
	{"type:*uint16", 0},
	{"type:int32", 0},
	{"type:*int32", 0},
	{"type:uint32", 0},
	{"type:*uint32", 0},
	{"type:int64", 0},
	{"type:*int64", 0},
	{"type:uint64", 0},

		{uint8(3), Uint64Value(3)},
		{uint16(4), Uint64Value(4)},
		{uint32(5), Uint64Value(5)},
		{uint64(6), Uint64Value(6)},
		{uintptr(7), Uint64Value(7)},
		{int8(8), Int64Value(8)},
		{int16(9), Int64Value(9)},
		{int32(10), Int64Value(10)},
		{int64(11), Int64Value(11)},
	} {
		got := AnyValue(test.in)
		if !got.Equal(test.want) {
			t.Errorf("%v (%[1]T): got %v (kind %s), want %v (kind %s)",