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Results 1 - 10 of 47 for 64xf32 (0.08 sec)
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tensorflow/compiler/mlir/tensorflow/tests/layout_optimization_to_nhwc.mlir
data_format = "NCHW", epsilon = 1.001000e-05 : f32, is_training = false } : (tensor<?x64x112x112xf32>, tensor<64xf32>, tensor<64xf32>, tensor<64xf32>, tensor<64xf32>) -> (tensor<?x64x112x112xf32>, tensor<64xf32>, tensor<64xf32>, tensor<64xf32>, tensor<64xf32>, tensor<*xf32>) // CHECK: "tf.FusedBatchNormV3" // CHECK-SAME: data_format = "NHWC"
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 7.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/layout_optimization_layout_assignment_to_nchw.mlir
exponential_avg_factor = 1.0 : f32, is_training = true } : (tensor<1x28x28x64xf32>, tensor<64xf32>, tensor<64xf32>, tensor<64xf32>, tensor<64xf32>) -> (tensor<1x28x28x64xf32>, tensor<64xf32>, tensor<64xf32>, tensor<64xf32>, tensor<64xf32>, tensor<64xf32>) func.return %y : tensor<1x28x28x64xf32> } // CHECK-LABEL: func @transposeFusedBatchNormGradV3
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 9K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/layout_optimization_layout_assignment_to_nhwc.mlir
exponential_avg_factor = 1.0 : f32, is_training = true } : (tensor<1x64x28x28xf32>, tensor<64xf32>, tensor<64xf32>, tensor<64xf32>, tensor<64xf32>) -> (tensor<1x64x28x28xf32>, tensor<64xf32>, tensor<64xf32>, tensor<64xf32>, tensor<64xf32>, tensor<64xf32>) func.return %y : tensor<1x64x28x28xf32> } // CHECK-LABEL: bias_add_nchw
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 4.5K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/layout_optimization_move_transposes_end.mlir
exponential_avg_factor = 1.0 : f32, is_training = false } : (tensor<1x112x112x64xf32>, tensor<64xf32>, tensor<64xf32>, tensor<64xf32>, tensor<64xf32>) -> (tensor<1x112x112x64xf32>, tensor<64xf32>, tensor<64xf32>, tensor<64xf32>, tensor<64xf32>, tensor<64xf32>) func.return %2#0 : tensor<1x112x112x64xf32> } // CHECK-LABEL: func @fold_into_pad_with_extra_uses
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 9.5K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/decompose_reduce_dataset.mlir
-> (tensor<i64>, tensor<i32>) attributes {tf._tf_data_function = true, tf.signature.is_stateful} { %0:2 = "tf.JustPretend"(%arg2, %arg3, %arg4, %arg5) : (tensor<32xf32>, tensor<64xf64>, tensor<!tf_type.resource<tensor<64xf32>>>, tensor<!tf_type.resource<tensor<128xf32>>>) -> (tensor<i64>, tensor<i32>) func.return %0#0, %0#1: tensor<i64>, tensor<i32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Aug 18 17:16:34 UTC 2022 - 9.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/get-arithmetic-count.mlir
func.return %0 : tensor<256x32x32x16xf32> } func.func @testConv2DDynamicShape(tensor<?x32x32x3xf32>, tensor<16x3x3x3xf32>, tensor<16xf32>) -> tensor<?x32x32x16xf32> { ^bb0(%arg0: tensor<?x32x32x3xf32>, %arg1: tensor<16x3x3x3xf32>, %arg2: tensor<16xf32>): // CHECK: _arithmetic_count = -1 : i64
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Dec 14 04:58:17 UTC 2022 - 7.7K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/flatbuffer2mlir/math.mlir
// Confirm that attributes that cannot be stored in the flatbuffer options // for a given operator are dropped silently. %1 = "tfl.squared_difference"(%arg0, %0) {fused_activation_function = "NONE"} : (tensor<4xf32>, tensor<4xf32>) -> tensor<4xf32> loc("squared_difference") %2 = "tfl.mul"(%arg0, %1) {fused_activation_function = "NONE"} : (tensor<4xf32>, tensor<4xf32>) -> tensor<4xf32> loc("mul")
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 02 09:41:17 UTC 2024 - 1.4K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/convert-tf-control-flow-to-scf.mlir
%add = "tf.AddV2"(%call, %call) : (tensor<4xf32>, tensor<4xf32>) -> tensor<4xf32> "tf.Yield"(%call, %add) : (tensor<4xf32>, tensor<4xf32>) -> () }, { %call_0 = func.call @test_if_else1(%arg1) : (tensor<4xf32>) -> tensor<4xf32> "tf.Yield"(%call_0, %call_0) : (tensor<4xf32>, tensor<4xf32>) -> () }) {is_stateless = false} : (tensor<i1>) -> (tensor<*xf32>, tensor<4xf32>)
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 5.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/raise-custom-ops.mlir
// CHECK-NEXT: "tfl.yield"(%[[MY_CUSTOM]]) : (tensor<4xf32>) -> () // CHECK-NEXT: }) {fused_activation_function = "RELU", int_attr = 2 : i32} : (tensor<4xf32>, tensor<4xf32>) -> tensor<4xf32> // CHECK-NEXT: %[[CUSTOM_2:.*]] = "tfl.custom_tf"(%[[MUL]], %[[CST]]) ({ // CHECK-NEXT: ^bb0(%arg1: tensor<4xf32>, %arg2: tensor<4xf32>):
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 4K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/tpu_colocate_composite_resource_ops.mlir
// CHECK-SAME: (%[[ARG0:.*]]: tensor<*x!tf_type.resource<tensor<4xf32>>>) func.func @testReadVariableOpColocated(%arg0: tensor<*x!tf_type.resource<tensor<4xf32>>>) { // CHECK: tf_device.replicate // CHECK-SAME: (%[[ARG0]] as %[[RI_0:[a-z0-9]*]]: tensor<*x!tf_type.resource<tensor<4xf32>>>) tf_device.replicate(%arg0 as %arg1: tensor<*x!tf_type.resource<tensor<4xf32>>>) { _mirrored_variable_indices = [0],
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Oct 31 08:59:10 UTC 2023 - 6.3K bytes - Viewed (0)